Legacy-Free Keyboard/Embedded Controller with SPI and LPC Docking Interface
Table 18.1 PWM0, PWM1, and PWM3 Speed Control Summary (continued)
FREQUENCY MULTIPLIER BITS
(Note 18.7)
PWMX
CLOCK
MULTI-
PLIER
BIT
00 (1X)
01 (2X)
10 (4X)
11 (8X)
PWMX
STDBY
CLOCK
BIT
PWMX
CLOCK
CONTR
OL BIT
PWMX
CLOCK
SELEC
T 1 BIT
PWMX
CLOCK
SELEC
T 0 BIT
FOUT
FOUT
FOUT
FOUT
6-BIT
DUTY
(KHZ)
(KHZ)
(KHZ)
(KHZ)
CYCLE
CONTR
OL(DCC)
DUTY
CYCLE
(%)
Note 18
.5
Note 18.
1
Note 18.
2
Note 18.
3
Note 18.
4
Note 18
.6
Note 18
.6
Note 18
.6
Note 18
.6
1
1
1
1
0
0
0
0
X
X
X
X
0
0
1
1
0
1
0
1
.032
.064
.128
.032
.064
.128
.032
.064
.128
.032
.064
.128
1-63
(DCC
÷ 64)
× 100
Reserv Reserv Reserv Reserv
ed
ed
ed
ed
1
1
X
X
X
0
0
0
0
-
-
(high)
(high)
(high)
(high)
Note 18.1 This is PWM0/PWM1 Speed Control register bit 0.
Note 18.2 his is PWM Control register Bit 2 or Bit 3.
Note 18.3 This is PWM Control register Bit 0 or Bit 1.
Note 18.4 This is PWM0/PWM1 Speed Control register Bit 7.
Note 18.5 This is PWM Control register Bit 4 or Bit 5.
Note 18.6 The F frequency tolerance is ± 5%.
out
Note 18.7 This is PWM0/PWM1/PWM3 Frequency Multiply Register Bits 0 and Bits 1.
Revision 1.1 (01-14-03)
200
SMSC LPC47N350
DATASHEET
SMSC [ SMSC CORPORATION ]
