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47N350 参数 Datasheet PDF下载

47N350图片预览
型号: 47N350
PDF下载: 下载PDF文件 查看货源
内容描述: LEGACY免费的键盘嵌入式控制器, SPI和LPC接口对接 [LEGACY FREE KEYBOARD EMBEDDED CONTROLLER WITH SPI AND LPC DOCKING INTERFACE]
分类和应用: 控制器PC
文件页数/大小: 346 页 / 4406 K
品牌: SMSC [ SMSC CORPORATION ]
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Legacy-Free Keyboard/Embedded Controller with SPI and LPC Docking Interface  
Table 17.1 Mailbox Registers Interface (continued)  
MAILBOX  
INDEX  
8051  
SYSTEM  
R/W  
ADDR.  
(7F00+)  
8051  
R/W  
POWER VCC1 VCC2  
REGISTER NAME  
ADDR  
PLANE  
POR  
POR  
NOTES  
UART1 FIFO Control  
Shadow register  
MBX9Bh  
R
-
-
VCC2  
00h  
Reserved  
MBX9Ch  
MBX9Dh  
MBX9Eh  
MBX9Fh  
-
-
Note 17.3  
PWM Control Register  
Flash Program Register  
Flash High Address  
R/W  
28h  
35h  
B0h  
R/W  
VCC1  
30h  
00h  
-
-
-
-
Mailbox Register [10-  
1F]  
MBX  
70h –  
7Fh  
A0h-AFh  
PWM0 Frequency  
Multiply  
MBXB0h  
MBXB1h  
MBXB2h  
MBXB3h  
97h  
98h  
99h  
9Ah  
-
PWM1 Frequency  
Multiply  
-
00h  
-
PWM2 Frequency  
Multiply  
VCC2  
VCC1  
-
PWM3 Frequency  
Multiply  
00h  
Note 17.1 Interrupt is cleared when read by the 8051.  
Note 17.2 Interrupt is cleared when read by the host.  
Note 17.3 This register is reserved and should not be accessed.  
17.2  
Mailbox Registers Interface Base Address  
Logical Device 9 in the LPC47N350 configuration space supports the Mailbox Registers Interface. The  
three device configuration registers in LDN9 provide activation control and the base address for the  
Mailbox Registers Interface run-time registers (Table 17.2).  
Register 0x30 is the Activate register. The activation control (LDN9:CR30.0) qualifies address decoding  
for the Mailbox Registers Interface; e.g., if the Activate bit D0 in the Activate register is “0”, the MBX  
access port addresses will not be decoded; if the Activate bit is “1”, MBX access port addresses will be  
decoded depending on the values programmed in the MBX Primary Base Address registers.  
Registers 0x60 and 0x61 are the MBX Primary Base Address registers. Register 0x60 is the MBX  
Primary Base Address High Byte, register 0x61 is the MBX Primary Base Address Low Byte.  
Note: Bit D0 in the MBX Primary Base Address Low Byte must be “0”. Valid Mailbox Registers  
Interface Base Address values are 0x0000 – 0x0FFE.  
Table 17.2 Mailbox Registers Interface Configuration Controls (LDN9)  
VCC1 &  
HARD  
SOFT  
VCC2  
VCC0  
POR  
INDEX  
TYPE  
RESET RESET POR  
DESCRIPTION  
D7 D6  
D5  
D4  
D3  
D2  
D1  
D0  
0x30  
R/W  
0x00  
0x00  
0x00  
-
Activate  
Revision 1.1 (01-14-03)  
192  
SMSC LPC47N350  
DATASHEET  
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