Legacy-Free Keyboard/Embedded Controller with SPI and LPC Docking Interface
is enabled, writing a 1 to bit 1 of the Port92 register forces ALT_GATEA20 high. ALT_GATEA20 high
drives GATEA20 high regardless of the state of A20 from the keyboard controller.
ALT_CPU_RESET
This bit provides an alternate means to generate a CPU_RESET pulse. The CPU_RESET output
provides a means to reset the system CPU to effect a mode switch from Protected Virtual Address Mode
to the Real Address Mode. This provides a faster means of reset than is provided through the 8051
keyboard controller. Writing a “1” to this bit will cause the nALT_RST internal signal to pulse (active
low) for a minimum of 6µs after a delay of 14µs. Before another nALT_RST pulse can be generated,
this bit must be written back to “0”.
13.4.4 GATEA20
The hardware GATEA20 state machine returns to state S1 from state S2 when CMD = D1 (Figure 13.3).
CMD !=D1 or
DATA
[IBF=1]
RESET
S0
CMD = D1
[IBF=0]
CMD = FF
[IBF=0]
CMD !=D1 or
CMD !=FF or
DATA
CMD !=D1
[IBF=1]
[IBF=1]
CMD = D1
[IBF=0]
CMD = D1
[IBF=0]
S2
S1
Data
[IBF=0, Latch DIN
Notes: GateA20 Changes When in S1 going to S2
Clock = wrdinB
CMD = [SA2=1]
Data = [SA2=0]
GateA20 State Machine
Figure 13.3 GATEA20 State Machine
13.5
Direct Keyboard Scan
The LPC47N350 scanning keyboard controller is designed for intelligent keyboard management in
computer applications. By properly configuring GPIO4 and GPIO5, the LPC47N350 may be programmed
to directly control keyboard interface matrixes of up to 16x8.
SMSC LPC47N350
151
Revision 1.1 (01-14-03)
DATASHEET
SMSC [ SMSC CORPORATION ]
