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STK10C68-5S25 参数 Datasheet PDF下载

STK10C68-5S25图片预览
型号: STK10C68-5S25
PDF下载: 下载PDF文件 查看货源
内容描述: 8K ×8的nvSRAM QuantumTrap⑩ CMOS非易失性静态RAM [8K x 8 nvSRAM QuantumTrap⑩ CMOS Nonvolatile Static RAM]
分类和应用: 静态存储器
文件页数/大小: 12 页 / 471 K
品牌: SIMTEK [ SIMTEK CORPORATION ]
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STK10C68  
a
ABSOLUTE MAXIMUM RATINGS  
Note a: Stresses greater than those listed under “Absolute Maximum  
Ratings” may cause permanent damage to the device. This is a  
stress rating only, and functional operation of the device at condi-  
tions above those indicated in the operational sections of this  
specification is not implied. Exposure to absolute maximum rat-  
ing conditions for extended periods may affect reliability.  
Voltage on Input Relative to Ground. . . . . . . . . . . . . .0.5V to 7.0V  
Voltage on Input Relative to VSS . . . . . . . . . . –0.6V to (VCC + 0.5V)  
Voltage on DQ0-7. . . . . . . . . . . . . . . . . . . . . . –0.5V to (VCC + 0.5V)  
Temperature under Bias . . . . . . . . . . . . . . . . . . . . . –55°C to 125°C  
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C  
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1W  
DC Output Current (1 output at a time, 1s duration). . . . . . . . 15mA  
DC CHARACTERISTICS  
(V = 5.0V 10%)  
CC  
INDUSTRIAL/  
MILITARY  
COMMERCIAL  
SYMBOL  
PARAMETER  
UNITS  
NOTES  
MIN  
MAX  
MIN  
MAX  
b
I
Average V  
Current  
85  
75  
65  
90  
75  
65  
55  
mA  
mA  
mA  
mA  
t
t
t
t
= 25ns  
CC  
CC  
AVAV  
AVAV  
AVAV  
AVAV  
1
= 35ns  
= 45ns  
= 55ns  
N/A  
c
I
I
Average V  
Average V  
Current during STORE  
3
3
mA  
mA  
All Inputs Don’t Care, V = max  
CC  
CC  
CC  
CC  
CC  
2
3
b
Current at t  
AVAV  
= 200ns  
W (V  
– 0.2V)  
CC  
All Others Cycling, CMOS Levels  
10  
10  
5V, 25°C, Typical  
d
d
I
Average V Current  
27  
23  
20  
28  
24  
21  
20  
mA  
mA  
mA  
mA  
t
t
t
t
= 25ns, E V  
= 35ns, E V  
= 45ns, E V  
= 55ns, E V  
SB  
CC  
(Standby, Cycling TTL Input Levels)  
AVAV  
AVAV  
AVAV  
AVAV  
IH  
IH  
IH  
IH  
1
N/A  
I
I
I
V
Standby Current  
E (V  
– 0.2V)  
CC  
SB  
CC  
2
750  
1
1500  
μA  
μA  
μA  
(Standby, Stable CMOS Input Levels)  
All Others V 0.2V or (V – 0.2V)  
IN CC  
Input Leakage Current  
V
V
= max  
CC  
ILK  
1
5
= V to V  
IN  
SS CC  
Off-State Output Leakage Current  
V
V
= max  
CC  
OLK  
5
= V to V , E or G V  
IN  
SS CC  
IH  
V
V
V
V
T
Input Logic “1” Voltage  
Input Logic “0” Voltage  
2.2  
V
+ .5  
2.2  
V
+ .5  
V
V
All Inputs  
All Inputs  
IH  
CC  
CC  
V
– .5  
0.8  
V
– .5  
0.8  
IL  
SS  
SS  
I
I
=–4mA  
Note a: Output Logic “1” Voltage  
Output Logic “0” Voltage  
Operating Temperature  
2.4  
2.4  
V
OH  
OL  
OUT  
OUT  
0.4  
70  
0.4  
85/125  
V
= 8mA  
0
–40/-55  
°C  
A
Note b: ICC and ICC3 are dependent on output loading and cycle rate. The specified values are obtained with outputs unloaded.  
Note c: ICC1 is the average current required for the duration of the STORE cycle (tSTORE ).  
Note d: E 2VIH will not produce standby current levels until any nonvolatile cycle in progress has timed out.  
AC TEST CONDITIONS  
5.0V  
Input Pulse Levels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0V to 3V  
Input Rise and Fall Times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ≤ 5ns  
Input and Output Timing Reference Levels . . . . . . . . . . . . . . . 1.5V  
Output Load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .See Figure 1  
480 Ohms  
OUTPUT  
e
30 pF  
CAPACITANCE  
(TA = 25°C, f = 1.0MHz)  
INCLUDING  
SCOPE AND  
FIXTURE  
255 Ohms  
SYMBOL  
PARAMETER  
MAX  
UNITS  
CONDITIONS  
ΔV = 0 to 3V  
ΔV = 0 to 3V  
C
Input Capacitance  
Output Capacitance  
8
7
pF  
IN  
C
pF  
OUT  
Note e: These parameters are guaranteed but not tested.  
Figure 1: AC Output Loading  
March 2006  
2
Document Control # ML0006 rev 0.2  
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