STK10C68
RECALL CYCLES #1, #2 & #3
(V = 5.0V 10%)
CC
SYMBOLS
NO.
PARAMETER
MIN
MAX
UNITS
#1
#2
#3
p
33
34
35
36
37
38
39
40
t
t
t
t
t
t
t
t
t
t
t
RECALL Cycle Time
20
μs
ns
ns
ns
ns
ns
ns
μs
NLQX
ELQXR
ELNHR
NLEL
GLQXR
GLNH
NLGL
q
RECALL Initiation Cycle Time
NE Set-up
20
0
NLNH
tGLNL
Output Enable Set-up
Write Enable Set-up
0
GLEL
t
t
t
t
t
t
0
WHNL
ELNL
NLQZ
WHEL
GLEL
WHGL
Chip Enable Set-up
0
ELGL
NE Fall to Outputs Inactive
Power-up RECALL Duration
20
550
RESTORE
Note p: Measured with W and NE both high, and G and E low.
Note q: Once tNLNH has been satisfied by NE, G, W and E, the RECALL cycle is completed automatically. Any of NE, G or E may be used to terminate
the RECALL initiation cycle.
Note r: If W is low at any point in which both E and NE are low and G is high, then a STORE cycle will be initiated instead of a RECALL.
o
RECALL CYCLE #1: NE Controlled
34
NLNH
t
NE
G
36
GLNL
t
W
E
37
WHNL
t
38
ELNL
33
NLQX
t
t
39
NLQZ
t
HIGH IMPEDANCE
DQ (DATA OUT)
o
RECALL CYCLE #2: E Controlled
35
t
NLEL
NE
36
GLEL
t
G
W
E
37
WHEL
34
ELNHR
t
t
33
ELQXR
t
HIGH IMPEDANCE
DQ (DATA OUT)
,
RECALL CYCLE #3: G Controlledo r
35
NLGL
t
NE
G
34
GLNH
t
37
WHGL
t
W
E
38
ELGL
t
33
GLQXR
t
HIGH IMPEDANCE
DQ (DATA OUT)
March 2006
7
Document Control # ML0006 rev 0.2
SIMTEK [ SIMTEK CORPORATION ]
