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SII0680ACLU144 参数 Datasheet PDF下载

SII0680ACLU144图片预览
型号: SII0680ACLU144
PDF下载: 下载PDF文件 查看货源
内容描述: PCI转IDE / ATA [PCI to IDE/ATA]
分类和应用: PC
文件页数/大小: 124 页 / 782 K
品牌: SILICONIMAGE [ Silicon image ]
 浏览型号SII0680ACLU144的Datasheet PDF文件第91页浏览型号SII0680ACLU144的Datasheet PDF文件第92页浏览型号SII0680ACLU144的Datasheet PDF文件第93页浏览型号SII0680ACLU144的Datasheet PDF文件第94页浏览型号SII0680ACLU144的Datasheet PDF文件第96页浏览型号SII0680ACLU144的Datasheet PDF文件第97页浏览型号SII0680ACLU144的Datasheet PDF文件第98页浏览型号SII0680ACLU144的Datasheet PDF文件第99页  
SiI0680A PCI to IDE/ATA  
Data Sheet  
Silicon Image, Inc.  
9.7.40 IDE1 Task File Register 1  
Address Offset: C4H  
Access Type: Read/Write  
Reset Value: 0x0000_0000  
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00  
IDE1 Task File Command + Status  
IDE1 Task File Device+Head  
IDE1 Task File Cylinder High  
IDE1 Task File Cylinder Low  
This register defines one of the IDE Channel #1 Task File registers in the SiI 0680A. Access to these bit fields is permitted if  
the PCI bus Byte Enable is active for one byte only. The register bits are defined below.  
Bit [31:24]: IDE1 Task File Command (W). This write-only bit field defines the IDE1 Task File Command  
register.  
Bit [31:24]: IDE1 Task File Status (R). This read-only bit field defines the IDE1 Task File Status register.  
Bit [23:16]: IDE1 Task File Device+Head (R/W). This bit field defines the IDE1 Task File Device and Head  
register.  
Bit [15:08]: IDE1 Task File Cylinder High (R/W). This bit field defines the IDE1 Task File Cylinder High register.  
Bit [07:00]: IDE1 Task File Cylinder Low (R/W). This bit field defines the IDE1 Task File Cylinder Low register.  
9.7.41 IDE1 Task File Register 2  
Address Offset: C8H  
Access Type: Read/Write  
Reset Value: 0x0000_0000  
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00  
Reserved  
IDE1 Task File Device Control  
IDE1 Task File Auxiliary Status  
Reserved  
Reserved  
This register defines one of the IDE Channel #1 Task File registers in the SiI 0680A. Access to these bit fields is permitted if  
the PCI bus Byte Enable is active for one byte only. The register bits are defined below.  
Bit [31:24]: Reserved (R). This bit field is reserved and returns zeros on a read.  
Bit [23:16]: IDE1 Task File Device Control (W). This bit field defines the IDE1 Task File Device Control register.  
Bit [23:16]: IDE1 Task File Auxiliary Status (R). This bit field defines the IDE1 Task File Auxiliary Status  
register.  
Bit [15:00]: Reserved (R). This bit field is reserved and returns zeros on a read.  
© 2006 Silicon Image, Inc.  
SiI-DS-0069-C  
95  
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