SiI0680A PCI to IDE/ATA
Data Sheet
Silicon Image, Inc.
Address
7FFFFH
7FFFEH
7FFFDH
7FFFCH
7FFFBH
7FFFAH
7FFF9H
7FFF8H
7FFF7H
7FFF6H
7FFF5H
7FFF4H
Data Byte
D00
Description
Data Signature = AAH
Data Signature = 55H
D01
D02
AA = 120 ns FLASH device / Else, 240 ns FLASH device
Data Signature = 55H
D03
D04
PCI Device ID [23:16]
D05
PCI Device ID [31:24]
D06
PCI Class Code [15:08]
D07
PCI Class Code [23:16]
D08
PCI Sub-System Vendor ID [07:00]
PCI Sub-System Vendor ID [15:08]
PCI Sub-System ID [23:16]
PCI Sub-System ID [31:24]
D09
D10
D11
Table 8-2: FLASH Data Description
8.2 Auto-Initialization from EEPROM
The SiI 0680A initiates the EEPROM detection and configuration space loading sequence after the FLASH read sequence.
The SiI 0680A supports up to 256 byte EEPROM with a 2-wire serial interface. The sequence of operations consists of the
following.
1) START condition defined as a high-to-low transition on SDAT while SCLK is high.
2) Control byte = 1010 (Control Code) + 000 (Chip Select) + 0 (Write Address)
3) Acknowledge
4) Starting address field = 00000000.
5) Acknowledge
6) Sequential data bytes separated by Acknowledges.
7) STOP condition.
While the sequence is active, the SiI 0680A responds to all PCI bus accesses with a Target Retry.
S
1
0
1
0
0
0
0
W
A
D
D
D
N
P
SDAT
t1
t2
SCLK
t3
MEM_CS_N
Figure 8-2: Auto-Initialization from EEPROM Timing
© 2006 Silicon Image, Inc.
SiI-DS-0069-C
44