SiI0680A PCI to IDE/ATA
Data Sheet
Silicon Image, Inc.
8. Auto-Initialization
The SiI 0680A ASIC supports an external FLASH and/or EEPROM device for BIOS extensions and user-defined PCI
configuration header data. Interface to either memory device is performed through a set of special function ATA pins. These
pins are active in the SiI 0680A auto-initialization mode after release of PCI_RST_N, and return to normal ATA function mode
after the auto-initialization is complete.
8.1 Auto-Initialization from FLASH
The SiI 0680A initiates the FLASH detection and configuration space loading sequence upon the release of PCI_RST_N. It
begins by reading the highest two addresses (7FFFFH and 7FFFEH), checking for the correct data signature pattern – AAH and
55H, respectively. If the data signature pattern is correct, the SiI 0680A continues to sequence the address downward, reading
a total of twelve bytes. If the Data Signature is correct (55H at 7FFFCH), the last eight bytes are loaded into the PCI
Configuration Space registers.
Note: If both Flash and EEPROM are installed, the PCI Configuration Space registers will be loaded with EEPROM’s data.
While the sequence is active, the SiI 0680A responds to all PCI bus accesses with a Target Retry.
7FFFF 7FFFE 7FFFD 7FFFC 7FFFB 7FFFA 7FFF9 7FFF8 7FFF7 7FFF6 7FFF5 7FFF4
MEM_ADDR
D00
D01
D02
D03
D04
D05
D06
D07
D08
D09
D10
D11
MEM_DATA
MEM_RD_N
MEM_WR_N
MEM_CS_N
PCI_RST_N
t1
t2
Figure 8-1: Auto-Initialization from Flash Timing
Parameter
Value
660 ns
7200 ns
Description
t1
t2
PCI reset to Flash Auto-Initialization cycle begin
Flash Auto-Initialization cycle time
Table 8-1: Auto-Initialization from Flash Timing
© 2006 Silicon Image, Inc.
SiI-DS-0069-C
43
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