SC9821C
Address[3:0]:
Assign the operation object. Note: When Address [3:0] = 4’b1111, all the Guests will
be operation objects (common), but at this time, the Guest should close the feedback
channel and only receive the data sending by Host. And when select the only Guest, it
can be bidirectional communication (respective).
BurstLength:
Addr:
Denote the operation length of Burst.
8•bit addressing address of Host.
Ack:
It is an acknowledge signal. In the address check all modes; this signal is only used as
leading data (low level) to denote the beginning of the data pack because the
feedback channel of Guest is closed. In one•to•one mode, After the Guest receives a
serial of pack leading with Command byte; it must feed back to Host an Ack signal in
defined time which is decided by Host itself. When sending the data, if the
transmission direction is from Host to Guest this time, Guest must feed back an Ack
signal in defined time every time it receives a data; if overstep, Host will pull up
DataAvail and end this transmission. When Host sends the data, if there is other data
needed transmission after Host receives the Ack signal, it must transmit following the
next cycle; When Host receives data, it must come into receiving state (otherwise end
this transmission directly) after Host receives the Ack signal.
Data:
The transmitted data is following the leading Ack signal, and the latter limited a data
when Burst is 0. When over the provision data, the receiver may not correspond to Ack
signal.
According to above description, if complete the operations from Host to Guest, the read•write operation is as
followed:
Adopt 8•bit effective address, and assume the addressing address of guest is 0H:
Figure 2 SSI write operation
Figure 3 SSI read operation
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