SC9821C
(Continued)
Pin No.
47
Pin name
VDD3.3
I/O
Pin descriptions
Power supply for chip ports (3.3V)
I
I
48
XALTI
Crystal oscillator input pin
49
XALTO
O
I
Crystal oscillator output pin
System reset pin which is low active
50
NotExtAsyncReset
51
Test mode configuration pin (high active, connect to the ground
when the chip is not in test mode).
Ground.
TestMode
I
52
53
54
55
56
57
58
59
60
61
62
63
64
VSS
I
I
VDD1.8
SsiSClk
Data
Power supply for chip kernel. (1.8V)
Clock input pin of MCU interface
Data pin of MCU interface
I
I/O
I
DataAvail
YFCLK
Communication control pin of MCU interface
Sub code frame sync signal
I
YBLKCK
YFLAG
I
Sub code block sync signal
I
CD servo error flag
InterruptToMcu
Addr<0>
Addr<1>
Addr<2>
Addr<3>
O
O
O
O
O
Interrupt signal output to MCU, and high active
SDRAM/DRAM address pin 0
SDRAM/DRAM address pin 1
SDRAM/DRAM address pin 2
SDRAM/DRAM address pin 3
FUNCTION DESCRIPTION
1. INTERFACE FUNCTION
1.1 Interface to main control MCU
SC9821C communicates with MCU through synchronism serial bus (SSI) data interface of SILAN Company.
1.1.1 Serial interface signal form
The serial interface communicating with MCU has 3 signal lines including control signal, data signal, and the
signal sequence is as followed:
Where, SsiSClk is the clock generating from Host port, and the frequency can fluctuate in a wide range (as
long as the wave is not distortion), and is independent of Guest port; DataAvail used for marking effective data
time is also sent by host computer and it is a low active; Data is a bidirectional signal with pull•up resistor and
used for specific data communication and feedback. As above picture, the data sent by the host port is all at
the falling edge of SsiSClk and the feedback data or Ack signal of guest port are at the rising edge. We define
one transmitting process as a frame, and the specification of the coherent signals are as follows:
HANGZHOU SILAN MICROELECTRONICS CO.,LTD
Http:
REV:1.0
2006.07.21
www.silan.com.cn
Page 5 of 18
SILAN [ SILAN MICROELECTRONICS JOINT-STOCK ]
