EFR32MG13 Mighty Gecko Multi-Protocol Wireless SoC Family Data Sheet
Electrical Specifications
4.1.24.3 I2C Fast-mode Plus (Fm+)1
Table 4.57. I2C Fast-mode Plus (Fm+)1
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
SCL clock frequency2
SCL clock low time
SCL clock high time
SDA set-up time
fSCL
0
—
1000
kHz
tLOW
0.5
0.26
50
—
—
—
—
—
—
—
—
—
—
µs
µs
ns
ns
µs
tHIGH
tSU_DAT
tHD_DAT
SDA hold time
100
0.26
Repeated START condition tSU_STA
set-up time
(Repeated) START condition tHD_STA
hold time
0.26
—
—
µs
STOP condition set-up time tSU_STO
0.26
0.5
—
—
—
—
µs
µs
Bus free time between a
tBUF
STOP and START condition
Note:
1. For CLHR set to 0 or 1 in the I2Cn_CTRL register.
2. For the minimum HFPERCLK frequency required in Fast-mode Plus, refer to the I2C chapter in the reference manual.
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