EFR32MG13 Mighty Gecko Multi-Protocol Wireless SoC Family Data Sheet
Electrical Specifications
4.1.24.2 I2C Fast-mode (Fm)1
Table 4.56. I2C Fast-mode (Fm)1
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
SCL clock frequency2
SCL clock low time
SCL clock high time
SDA set-up time
fSCL
0
—
400
kHz
tLOW
1.3
0.6
—
—
—
—
—
—
—
µs
µs
ns
ns
µs
tHIGH
tSU_DAT
tHD_DAT
100
100
0.6
—
SDA hold time3
900
—
Repeated START condition tSU_STA
set-up time
(Repeated) START condition tHD_STA
hold time
0.6
—
—
µs
STOP condition set-up time tSU_STO
0.6
1.3
—
—
—
—
µs
µs
Bus free time between a
tBUF
STOP and START condition
Note:
1. For CLHR set to 1 in the I2Cn_CTRL register.
2. For the minimum HFPERCLK frequency required in Fast-mode, refer to the I2C chapter in the reference manual.
3. The maximum SDA hold time (tHD,DAT) needs to be met only when the device does not stretch the low time of SCL (tLOW).
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