EFM32G Data Sheet
Pin Definitions
Table 5.1. Device Pinout
QFN32 Pin# and Name
Pin Alternate Functionality / Description
Pin #
Pin Name
VSS
Analog
Ground.
Timers
Communication
Other
0
1
2
3
4
5
6
7
8
PA0
TIM0_CC0 #0/1
TIM0_CC1 #0/1
TIM0_CC2 #0/1
I2C0_SDA #0
I2C0_SCL #0
PA1
CMU_CLK1 #0
CMU_CLK0 #0
PA2
IOVDD_1
PC0
Digital IO power supply 1.
ACMP0_CH0
ACMP0_CH1
LFXTAL_P
PCNT0_S0IN #2
PCNT0_S1IN #2
US1_TX #0
US1_RX #0
US1_CLK #0
US1_CS #0
PC1
PB7
PB8
LFXTAL_N
Reset input, active low.To apply an external reset source to this pin, it is required to only drive this pin low
during reset, and let the internal pull-up ensure that reset is released.
9
RESETn
10
11
12
13
14
15
16
17
18
19
20
PB11
AVDD_2
PB13
DAC0_OUT0
LETIM0_OUT0 #1
Analog power supply 2.
HFXTAL_P
LEU0_TX #1
LEU0_RX #1
PB14
HFXTAL_N
IOVDD_3
AVDD_0
PD4
Digital IO power supply 3.
Analog power supply 0.
ADC0_CH4
LEU0_TX #0
LEU0_RX #0
I2C0_SDA #1
I2C0_SCL #1
PD5
ADC0_CH5
PD6
ADC0_CH6
ADC0_CH7
LETIM0_OUT0 #0
LETIM0_OUT1 #0
PD7
VDD_DREG Power supply for on-chip voltage regulator.
Decouple output for on-chip voltage regulator. An external capacitance of size CDECOUPLE is required at this
pin.
21
22
23
24
DECOUPLE
PC13
TIM0_CDTI0 #1/3 TIM1_CC0
ACMP1_CH5
#0 PCNT0_S0IN #0
TIM0_CDTI1 #1/3 TIM1_CC1
ACMP1_CH6
PC14
#0 PCNT0_S1IN #0
TIM0_CDTI2 #1/3 TIM1_CC2
PC15
ACMP1_CH7
DBG_SWO #1
#0
25
26
27
28
29
30
PF0
PF1
LETIM0_OUT0 #2
LETIM0_OUT1 #2
DBG_SWCLK #0/1
DBG_SWDIO #0/1
PF2
ACMP1_O #0 DBG_SWO #0
IOVDD_5
PE10
PE11
Digital IO power supply 5.
TIM1_CC0 #1
TIM1_CC1 #1
US0_TX #0
US0_RX #0
BOOT_TX
BOOT_RX
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