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C8051F530-IM 参数 Datasheet PDF下载

C8051F530-IM图片预览
型号: C8051F530-IM
PDF下载: 下载PDF文件 查看货源
内容描述: 8/4/2 KB ISP功能的Flash MCU系列 [8/4/2 kB ISP Flash MCU Family]
分类和应用:
文件页数/大小: 220 页 / 2701 K
品牌: SILICON [ SILICON ]
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C8051F52x-53x  
SFR Definition 11.2. IP: Interrupt Priority  
R
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
Reset Value  
-
PSPI0  
PT2  
PS0  
PT1  
PX1  
PT0  
PX0  
10000000  
Bit  
Bit7  
Bit6  
Bit5  
Bit4  
Bit3  
Bit2  
Bit1  
Bit0  
Addressable  
SFR Address:  
0xB8  
Bit7:  
UNUSED. Read = 1, Write = don't care.  
Bit6:  
Bit5:  
Bit4:  
Bit3:  
Bit2:  
Bit1:  
Bit0:  
PSPI0: Serial Peripheral Interface (SPI0) Interrupt Priority Control.  
This bit sets the priority of the SPI0 interrupt.  
0: SPI0 interrupt set to low priority level.  
1: SPI0 interrupt set to high priority level.  
PT2: Timer 2 Interrupt Priority Control.  
This bit sets the priority of the Timer 2 interrupt.  
0: Timer 2 interrupt set to low priority level.  
1: Timer 2 interrupt set to high priority level.  
PS0: UART0 Interrupt Priority Control.  
This bit sets the priority of the UART0 interrupt.  
0: UART0 interrupt set to low priority level.  
1: UART0 interrupt set to high priority level.  
PT1: Timer 1 Interrupt Priority Control.  
This bit sets the priority of the Timer 1 interrupt.  
0: Timer 1 interrupt set to low priority level.  
1: Timer 1 interrupt set to high priority level.  
PX1: External Interrupt 0 Priority Control.  
This bit sets the priority of the external interrupt 0.  
0: Int 0 interrupt set to low priority level.  
1: Int 0 interrupt set to high priority level.  
PT0: Timer 0 Interrupt Priority Control.  
This bit sets the priority of the Timer 0 interrupt.  
0: Timer 0 interrupt set to low priority level.  
1: Timer 0 interrupt set to high priority level.  
PX0: External Interrupt 0 Priority Control.  
This bit sets the priority of the external interrupt 0.  
0: Int 0 interrupt set to low priority level.  
1: Int 0 interrupt set to high priority level.  
94  
Rev. 0.3  
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