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C8051F336 参数 Datasheet PDF下载

C8051F336图片预览
型号: C8051F336
PDF下载: 下载PDF文件 查看货源
内容描述: 混合信号ISP功能的Flash MCU系列 [Mixed Signal ISP Flash MCU Family]
分类和应用: 微控制器和处理器外围集成电路
文件页数/大小: 234 页 / 3348 K
品牌: SILICON [ SILICON ]
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C8051F336/7/8/9  
action is a WRITE operation from the master to the slave, the master transmits the data a byte at a time  
waiting for an ACK from the slave at the end of each byte. For READ operations, the slave transmits the  
data waiting for an ACK from the master at the end of each byte. At the end of the data transfer, the master  
generates a STOP condition to terminate the transaction and free the bus. Figure 21.3 illustrates a typical  
SMBus transaction.  
SCL  
SDA  
SLA6  
SLA5-0  
R/W  
D7  
D6-0  
START  
Slave Address + R/W  
ACK  
Data Byte  
NACK  
STOP  
Figure 21.3. SMBus Transaction  
21.3.1. Transmitter Vs. Receiver  
On the SMBus communications interface, a device is the “transmitter” when it is sending an address or  
data byte to another device on the bus. A device is a “receiver” when an address or data byte is being sent  
to it from another device on the bus. The transmitter controls the SDA line during the address or data byte.  
After each byte of address or data information is sent by the transmitter, the receiver sends an ACK or  
NACK bit during the ACK phase of the transfer, during which time the receiver controls the SDA line.  
21.3.2. Arbitration  
A master may start a transfer only if the bus is free. The bus is free after a STOP condition or after the SCL  
and SDA lines remain high for a specified time (see Section “21.3.5. SCL High (SMBus Free) Timeout” on  
page 148). In the event that two or more devices attempt to begin a transfer at the same time, an arbitra-  
tion scheme is employed to force one master to give up the bus. The master devices continue transmitting  
until one attempts a HIGH while the other transmits a LOW. Since the bus is open-drain, the bus will be  
pulled LOW. The master attempting the HIGH will detect a LOW SDA and lose the arbitration. The winning  
master continues its transmission without interruption; the losing master becomes a slave and receives the  
rest of the transfer if addressed. This arbitration scheme is non-destructive: one device always wins, and  
no data is lost.  
Rev. 0.2  
147