8M (512K × 16, 1M × 8) Flash Memory
LH28F800SU
BUS OPERATIONS, COMMANDS AND STATUS REGISTER DEFINITIONS
Bus Operations for Word-Wide Mode (BYT» E» = V )
IH
MODE
RP»
VIH
VIH
CE»1
VIL
CE»0
VIL
OE»
VIL
VIH
WE
VIH
VIH
A1
X
DQ0 - DQ15
DOUT
RY/» BY»
NOTE
Read
X
X
1, 2, 7
1, 6, 7
Output Disable
VIL
VIL
X
High-Z
VIL
VIH
VIH
VIH
VIL
VIH
Standby
VIH
X
X
X
High-Z
X
1, 6, 7
Deep Power-Down
Manufacturer ID
Device ID
VIL
VIH
VIH
VIH
X
X
X
X
X
VIL
VIH
X
High-Z
00B0H
66A8H
DIN
VOH
VOH
VOH
X
1, 3
VIL
VIL
VIL
VIL
VIL
VIL
VIL
VIL
VIH
VIH
VIH
VIL
4
4
Write
1, 5, 6
Bus Operations For Byte-Wide Mode (BYT» E» = V )
IL
MODE
RP»
VIH
VIH
CE»1
VIL
CE»0
VIL
OE»
VIL
VIH
WE
VIH
VIH
A0
DQ0 - DQ7
DOUT
RY/» BY»
NOTE
Read
X
X
X
X
1, 2, 7
1, 6, 7
Output Disable
VIL
VIL
High-Z
VIL
VIH
VIH
VIH
VIL
VIH
Standby
VIH
X
X
X
High-Z
X
1, 6, 7
Deep Power-Down
Manufacturer ID
Device ID
VIL
VIH
VIH
VIH
X
X
X
X
X
VIL
VIH
X
High-Z
B0H
A8H
DIN
VOH
VOH
VOH
X
1, 3
VIL
VIL
VIL
VIL
VIL
VIL
VIL
VIL
VIH
VIH
VIH
VIL
4
4
Write
1, 5, 6
NOTES:
1. X can be V or V for address or control pins except for RY»/BY», which is either V or V .
IH
IL
OL
OH
2. RY»/BY» output is open drain. When the WSM is ready, Erase is suspended or the device is in deep power-down mode,
RY »/BY» will be at V if it is tied to V through a resistor. When the RY»/BY» at V is independent of OE while a WSM
»
OH
CC
OH
operation is in progress.
3. RP» at GND ± 0.2 V ensures the lowest deep power-down current.
4. A and A at V provide manufacturer ID codes in x8 and x16 modes respectively. A and A , at V provide device ID
0
1
IL
0
1
IH
codes in x8 and x16 modes respectively. All other addresses are set to zero.
5. Commands for different Erase operations, Data Write operations of Lock-Block operations can only be successfully
completed when V = V
.
PPH
PP
6. While the WSM is running, RY»/BY» in Level-Mode (default) stays at V until all operations are complete. RY»/BY» goes to
OL
V
when the WSM is not busy or in erase suspend mode.
OH
7. RY»/BY» may be at V while the WSM is busy performing various operations. For example, a status register read during a
OL
write operations.
9