8M (512K × 16, 1M × 8) Flash Memory
LH28F800SU
PIN DESCRIPTION (Continued)
SYMBOL
TYPE
NAME AND FUNCTION
WRITE PROTECT: Erase blocks can be locked by writing a non-volatile lock-bit for
each block. When WP is low, those locked blocks as reflected by the Block-Lock Status
bits (BSR.6), are protected from inadvertent Data Writes or Erases. When WP is high,
all blocks can be Written or Erased regardless of the state of the lock-bits. The WP
input buffer is disabled when RP» transitions low (deep power-down mode).
WP
INPUT
BYTE ENABLE: BYTE low places device x8 mode. All data is then input or output
on DQ0 - DQ7, and DQ8 - DQ15 float. Address A0 selects between the high and low
BYTE
INPUT
byte. BYTE high places the device in x16 mode, and turns off the A input buffer.
0
Address A1, then becomes the lowest order address.
3.3/5.0 VOLT SELECT: 3/5» high configures internal circuits for 3.3 V operation.
3/5» low configures internal circuits for 5.0 V operation.
NOTES: Reading the array with 3/5» high in a 5.0 V system could damage the
device. There is a significant delay from 3/5» switching to valid data.
3/5»
INPUT
ERASE/WRITE POWER SUPPLY (5.0 V ±0.5 V): For erasing memory array blocks or
writing words/bytes/pages into the flash array.
VPP
VCC
SUPPLY
DEVICE POWER SUPPLY (3.3 V ±0.3 V, 5.0 V ±0.5 V) (2.7 ~ 3.6 at Read Operation):
Do not leave any power pins floating.
SUPPLY
SUPPLY
GND
NC
GROUND FOR ALL INTERNAL CIRCUITRY: Do not leave any ground pins floating.
NO CONNECT: No internal connection to die, lead may be driven or left floating.
5
SHARP [ SHARP ELECTRIONIC COMPONENTS ]
