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LC89057W-VF4A-E 参数 Datasheet PDF下载

LC89057W-VF4A-E图片预览
型号: LC89057W-VF4A-E
PDF下载: 下载PDF文件 查看货源
内容描述: 数字音频接口收发器 [Digital Audio Interface Transceiver]
分类和应用:
文件页数/大小: 59 页 / 329 K
品牌: SANYO [ SANYO SEMICON DEVICE ]
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LC89057W-VF4A-E  
11.1.3 Validity flag input (VI)  
Validity flags can be input from RX5/VI by switching the contents of RX5/VI input by VISEL.  
The timing of writing a validity flag is shown below. The validity flag can be also written with the microcontroller  
interface, but port settings have priority over the validity flag.  
Writing validity flags with the microcontroller interface is done using VMODE.  
Table 11.1 RX5/V1 Input  
RX5/VI  
Output Conditions  
0
1
No error  
Error  
TLRCK  
TBCK  
L1  
R1  
L2  
R2  
L3  
VI  
V-L1  
V-R1  
V-L2  
V-R2  
V-L3  
Internal latch signal  
Figure 11.2 Validity Flag Input Timing  
11.1.4 User data input (UI)  
User data can be input from RX6/UI by switching the contents of RX6/UI input by UISEL.  
The timing of writing the user data is shown below.  
It is also possible to write user data using the preamble B sync signal as the reference. Generation of the preamble B  
sync signal is configured in PBSEL[1:0] as in the case of the DIR function. After the setting, the signal is output from  
CKST/PB.  
TLRCK  
TBCK  
UI  
U
U
U
U
U
Internal latch signal  
Figure 11.3 User Data Input Timing  
No.7202-33/59  
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