LA76810A
Continued from preceding page.
Input signal
Symbol
Test point
Input signal
Test method
Bus bit/input signal
VCOMP: 000
<High-voltage dependent vertical size correction>
Vertical size
correction@0
Vsizecomp
Y IN:
Monitor the pin 23 vertical ramp output and
measure the voltage at the line 24 and line 310
with VCOMP = 000. Calculate as follows:
Va = Vline310-Vline24
Horizontal/
vertical sync
signal
PAL
Apply 4.1V to pin 13 and measure the voltage at
the line 24 and line 310 again. Calculate as
follows:
Va = Vline310-Vline24
Calculate as follows:
Vsizecomp = Vb/Va
Vertical ramp output
Line 310
Line 24
<Vertical screen position adjustment>
Vertical ramp DC
voltage
PAL@32
Vdcpal32
Vdcnt32
Y IN:
Monitor the pin 23 vertical ramp output and
measure the voltage at line 167. (PAL)
Monitor the pin 23 vertical ramp output and
measure the voltage at line 142. (NTSC)
23
Horizontal/
vertical sync
signal
NTSC@32
PAL
NTSC
Vertical ramp output
Line 167
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Vertical ramp DC
voltage
PAL@0
Vdcpal0
Y IN:
Monitor the pin 23 vertical ramp output and
VDC: 000000
Horizontal/
vertical sync
signal
measure the voltage at line 167.
23
Vertical ramp output
PAL
Line 167
Vertical ramp DC
voltage
PAL@63
Vdcpal63
Y IN:
Monitor the pin 23 vertical ramp output and
measure the voltage at line 167.
VDC: 111111
Horizontal/
vertical sync
signal
Vertical ramp output
PAL
23
Line 167
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NoA0252-27/40
SANYO [ SANYO SEMICON DEVICE ]
