S3C4510B
SYSTEM MANAGER
BUS ARBITRATION
In the S3C4510B microcontroller, the term "system bus" refers to the separate system address and data buses
inside the chip. The S3C4510B's internal function blocks, or external devices, can request mastership of the
system bus and then hold the system bus in order to perform data transfers. Because the design of S3C4510B
bus allows only one bus master at a time, a bus controller is required to arbitrate when two or more internal units
or external devices simultaneously request bus mastership.
When bus mastership is granted to an internal function block or an external device, other pending requests are
not acknowledged until the previous bus master has released the bus.
To facilitate bus arbitration, priorities are assigned to each internal S3C4510B function block. The bus controller
arbitrattion requests for the bus mastership according to these fixed priorities. In the event of contention,
mastership is granted to the function block with the highest assigned priority. These priorities are listed in
Table 4-15.
NOTE
An external bus master can also be granted bus mastership and hold the S3C4510B system bus. In
Table 4-3, you will note that all external devices are assigned the identical priority. Therefore, in systems
made up of several external devices which can become the bus master, external circuitry must be
implemented to assign additional bus arbitration priorities to all potential external bus masters.
Table 4-15. Bus Priorities for Arbitration
Function Block
Bus Priority (Group)
External bus master
A-1 (Highest priority in Group A)
DRAM memory refresh controller
General DMA 1 (GDMA 1)
General DMA 0 (GDMA 0)
High level data link controller B (HDLC B)
High level data link controller A (HDLC A)
MAC buffered DMA (BDMA)
Writer buffer
A-2
A-3
A-4
A-5
A-6
A-7 (Lowest priority in Group A)
B-1 (Highest priority in Group B)
B-2 (Lowest priority in Group B)
Bus router
NOTE: Internal function blocks are divided into two groups, Group A and Group B. Within each group, the bus arbitration
priorities are fixed according to the assigned level. The relative priority of Group A and Group B is determined more
or less in an alternating manner.
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