OneNAND512Mb(KFG1216U2B-xIB6)
FLASH MEMORY
6.12
Block Erase Operation Timing
See AC Characteristics Tables 5.7 and 5.8
Erase Command Sequence (last two cycles)
Read Status Data
tAWES
tAH
AA*
SA
A0:A15
AA
CA
SA
In
PMB
Complete
DQ0-DQ15
CE
EMA
tCH
ECD
tDS
Progress
tCS
tDH
tCH
OE
tWPL
WE
tWPH
tBERS1
tCS
tINTW
tWC
VIL
CLK
INT
NOTES:
1. AA = Address of address register
CA = Address of command register
ECD = Erase Command
EMA = Address of memory to be erased
SA = Address of status register
AA* = Address of Start Address1 Register(for Flash Block Address)
PMB = DFS & FBA(Flash Block address) of memory to be programmed next time
2. “In progress” and “complete” refer to status register
3. Status reads in this figure is asynchronous read, but status read in synchronous mode is also supported.
4. tINTW should be guranteed in case of consecutive Program/Erase/Multi-block erase/Lock/Unlock/Lock-tight operations
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