欢迎访问ic37.com |
会员登录 免费注册
发布采购

K5A3280YTC-T855 参数 Datasheet PDF下载

K5A3280YTC-T855图片预览
型号: K5A3280YTC-T855
PDF下载: 下载PDF文件 查看货源
内容描述: MCP内存 [MCP MEMORY]
分类和应用:
文件页数/大小: 45 页 / 619 K
品牌: SAMSUNG [ SAMSUNG ]
 浏览型号K5A3280YTC-T855的Datasheet PDF文件第20页浏览型号K5A3280YTC-T855的Datasheet PDF文件第21页浏览型号K5A3280YTC-T855的Datasheet PDF文件第22页浏览型号K5A3280YTC-T855的Datasheet PDF文件第23页浏览型号K5A3280YTC-T855的Datasheet PDF文件第25页浏览型号K5A3280YTC-T855的Datasheet PDF文件第26页浏览型号K5A3280YTC-T855的Datasheet PDF文件第27页浏览型号K5A3280YTC-T855的Datasheet PDF文件第28页  
Preliminary  
K5A3x80YT(B)C  
MCP MEMORY  
DQ3 : Block Erase Timer  
The status of the multi-block erase operation can be detected via the DQ3 ball. DQ3 will go High if 50ms of the block erase time win-  
dow expires. In this case, the Internal Erase Routine will initiate the erase operation.Therefore, the device will not accept further write  
commands until the erase operation is completed. DQ3 is Low if the block erase time window is not expired. Within the block erase  
time window, an additional block erase command (30H) can be accepted. To confirm that the block erase command has been  
accepted, the software may check the status of DQ3 following each block erase command.  
DQ2 : Toggle Bit 2  
The device generates a toggling pulse in DQ2 only if an Internal Erase Routine or an Erase Suspend is in progress. When the device  
executes the Internal Erase Routine, DQ2 toggles only if an erasing block is read. Although the Internal Erase Routine is in the  
Exceeded Time Limits, DQ2 toggles only if an erasing block in the Exceeded Time Limits is read. When the device is in the Erase  
Suspend mode, DQ2 toggles only if an address in the erasing block is read. If a non-erasing block address is read during the Erase  
Suspend mode, then DQ2 will produce valid data. DQ2 will go High if the user tries to program a non-erase suspend block while the  
device is in the Erase Suspend mode. Combination of the status in DQ6 and DQ2 can be used to distinguish the erase operation  
from the program operation.  
RY/BY : Ready/Busy  
Flash memory has a Ready / Busy output that indicates either the completion of an operation or the status of Internal Algorithms. If  
the output is Low, the device is busy with either a program or an erase operation. If the output is High, the device is ready to accept  
any read/write or erase operation. When the RY/ BY ball is low, the device will not accept any additional program or erase commands  
with the exception of the Erase Suspend command. If Flash memory is placed in an Erase Suspend mode, the RY/ BY output will be  
High. For programming, the RY/ BY is valid (RY/ BY = 0) after the rising edge of the fourth WE pulse in the four write pulse  
sequence. For Chip Erase, RY/ BY is also valid after the rising edge of WE pulse in the six write pulse sequence. For Block Erase,  
RY/ BY is also valid after the rising edge of the sixth WE pulse.  
The ball is an open drain output, allowing two or more Ready/ Busy outputs to be OR-tied. An appropriate pull-up resistor is required  
for proper operation.  
Rp  
VccF  
Vcc (Max.) - VOL (Max.)  
F
2.9V  
Rp =  
=
IOL + S IL  
2.1mA + S IL  
Ready / Busy  
open drain output  
where S IL is the sum of the input currents of all devices tied to the  
Ready / Busy ball.  
Vss  
Device  
Revision 0.0  
November 2002  
- 24 -  
 复制成功!