ADSP-BF531/ADSP-BF532/ADSP-BF533
SPECIFICATIONS
Component specifications are subject to change
without notice.
OPERATING CONDITIONS
Parameter
Conditions
Min Nominal Max Unit
VDDINT Internal Supply Voltage1
VDDINT Internal Supply Voltage1
VDDINT Internal Supply Voltage1
VDDINT Internal Supply Voltage1
VDDINT Internal Supply Voltage1
VDDEXT External Supply Voltage3
VDDEXT External Supply Voltage
Nonautomotive 400 MHz and 500 MHz speed grade models2
Nonautomotive 533 MHz speed grade models2
600 MHz speed grade models2
Automotive 400 MHz speed grade models2
Automotive 533 MHz speed grade models2
Nonautomotive grade models2
0.8 1.2
1.45
1.45
1.45
1.45
1.45
3.6
V
V
V
V
V
V
V
V
0.8 1.25
0.8 1.30
0.95 1.2
0.95 1.25
1.75 1.8/3.3
2.7 3.3
Automotive grade models2
Nonautomotive grade models2
3.6
VDDRTC Real-Time Clock
Power Supply Voltage
1.75 1.8/3.3
3.6
VDDRTC Real-Time Clock
Power Supply Voltage
Automotive grade models2
2.7 3.3
3.6
V
VIH
VIH
High Level Input Voltage4, 5 VDDEXT =1.85 V
High Level Input Voltage4, 5 VDDEXT =Maximum
1.3
2.0
2.2
V
V
V
V
V
VIHCLKIN High Level Input Voltage6
VDDEXT =Maximum
VIL
VIL
TJ
TJ
TJ
TJ
TJ
TJ
Low Level Input Voltage7
Low Level Input Voltage7
Junction Temperature
Junction Temperature
Junction Temperature
Junction Temperature
Junction Temperature
Junction Temperature
VDDEXT =1.75 V
+0.3
+0.6
VDDEXT =2.25 V
160-Ball Chip Scale Ball Grid Array (CSP_BGA) @ TAMBIENT = 0°C to +70°C
0
+95 °C
+105 °C
+125 °C
+125 °C
+105 °C
+100 °C
160-Ball Chip Scale Ball Grid Array (CSP_BGA) @ TAMBIENT = –40°C to +85°C –40
160-Ball Chip Scale Ball Grid Array (CSP_BGA) @ TAMBIENT = –40°C to +105°C –40
169-Ball Plastic Ball Grid Array (PBGA) @ TAMBIENT = –40°C to +105°C
169-Ball Plastic Ball Grid Array (PBGA) @ TAMBIENT = –40°C to +85°C
176-Lead Quad Flatpack (LQFP) @ TAMBIENT = –40°C to +85°C
–40
–40
–40
1 The regulator can generate VDDINT at levels of 0.85 V to 1.2 V with –5% to +10% tolerance, 1.25 V with –4% to +10% tolerance, and 1.3 V with –0% to +10% tolerance.
2 See Ordering Guide on Page 64.
3 When VDDEXT < 2.25 V, on-chip voltage regulation is not supported.
4 Applies to all input and bidirectional pins except CLKIN.
5 The ADSP-BF531/ADSP-BF532/ADSP-BF533 processors are 3.3 V tolerant (always accepts up to 3.6 V maximum VIH), but voltage compliance (on outputs, VOH) depends on
the input VDDEXT, because VOH (maximum) approximately equals VDDEXT (maximum). This 3.3 V tolerance applies to bidirectional pins (DATA15–0, TMR2–0, PF15–0, PPI3–0,
RSCLK1–0, TSCLK1–0, RFS1–0, TFS1–0, MOSI, MISO, SCK) and input only pins (BR, ARDY, PPI_CLK, DR0PRI, DR0SEC, DR1PRI, DR1SEC, RX, RTXI, TCK, TDI, TMS,
TRST, CLKIN, RESET, NMI, and BMODE1–0).
6 Applies to CLKIN pin only.
7 Applies to all input and bidirectional pins.
Rev. H
| Page 21 of 64 | January 2011
ROCHESTER [ Rochester Electronics ]
