R8C/13 Group
5.4 Voltage Detection Circuit
Voltage detection register 1
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
VCR1
Address
001916
After reset(2)
00001000
0 0 0 0
0 0 0
2
Bit name
Function
RW
RW
RO
Bit symbol
Reserved bit
Should set to “0”
(b2-b0)
0:VCC < Vdet
Vdet or voltage
detection circuit disabled
Voltage monitor flag(1)
VC13
1:VCC
≥
RW
Reserved bit
Should set to “0”
(b7-b4)
NOTES:
1. The VC13 bit is valid when the VC27 bit in the VCR2 register is set to “1” (voltage detection circuit enabled). The
VC13 bit is set to “1” (VCC≥Vdet or voltage detection circuit disabled) when the VC27 bit in the VCR2 register is set
to “0” (voltage detection circuit disabled).
2. Software reset or the watchdog timer reset does not affect this register.
Voltage detection register 2(1)
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
VCR2
Address
001A16
After reset(3)
Reset input : 0016
RESET pin = “H” retaining : 10000000
0 0 0 0 0 0 0
2
Bit name
RW
RW
Bit symbol
(b6-b0)
Function
Reserved bit
Should set to “0”
0: Voltage detection circuit
disabled
1: Voltage detection circuit
enabled
Voltage monitor enable
bit(2)
VC27
RW
NOTES:
1. Set the PRC3 bit in the PRCR register to “1” (write enabled) before writing to this register.
2. Set the VC27 bit to “1” (voltage detect circuit enabled) when hardware reset 2 is used.
After the VC27 bit is set to “1”, the voltage detection circuit elapses for td(E-A) before starting operation.
3. Software reset or the watchdog timer reset does not affect this register.
Figure 5.8 VCR1 Register and VCR2 Register
Rev.1.20 Jan 27, 2006 page 22 of 205
REJ09B0111-0120
RENESAS [ RENESAS TECHNOLOGY CORP ]
