M66291GP/HP
2
Registers
How to Read Register Tables
Bit Numbers :
Each register is connected with an internal bus of 16-bit wide, so the bit numbers of the
registers located at odd addresses are b15-b8, and those at even addresses are b7-b0.
State of Register at Reset :
Represents the initial state of each register immediately after reset with hexadecimal numbers.
The "H/W reset" is the reset by an external reset signal; the "S/W reset" is the reset by the
USBE bit of the USB Operation Enable Register.
At Read:
... Read enabled
? ... Read disabled (Read value invalid)
0 ... Read always as 0
1 ... Read always as 1
At Write:
... Write enabled
∆
... Write enable conditionally (includes some conditions at write)
— ... Write disabled (Don’t care “0” and “1” at write)
X ··· Write disabled
<Example of representation>
Not implemented in the shaded portion.
b15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
b0
Abit
H/W reset
S/W reset
USB bus reset
0
0
0
0
0
0
Bbit
0
0
0
Cbit
0
0
0
<H/W reset : H'0000>
<S/W reset : ->
<USB bus reset : ->
b
15
14
Bit name
Reserved.
A bit
(------------------------)
13
B bit
(------------------------)
12
C bit
(------------------------)
0: ------------------------
1: ------------------------
0: ------------------------
1: ------------------------
0: ------------------------
1: ------------------------
0
0
0
0
Function
R
0
0
W
-
0
Rev1.01
2004.11.01
page 9 of 122
RENESAS [ RENESAS TECHNOLOGY CORP ]
