M66291GP/HP
(1) USB Transceiver
The USB transceiver, conforming to the USB Specification Revision 2.0, is composed of a pair of 2 pieces of
drivers D+/D- complying with full speed transfer mode, a pair of 2 pieces of single end receivers and a
differential input receiver. A serial resistance for impedance matching is needed external to the chip.
(2) Oscillation Buffer, 48 MHz PLL
The 48 MHz clock with accuracy ± 0.25% is needed at the USB-IP block. The M66291 has a built-in oscillation
buffer and a 48 MHz PLL. The PLL is capable of setting the multiplication number depending on the program
and can therefore be connected with an external oscillation of 6, 12 or 24 MHz. Further, it can also be operated
by the external 48 MHz clock without using the PLL function.
(3) Vbus Input Circuit, D+ Pin Pullup Control Circuit
The M66291 is capable of learning the connection status with host/hub by means of Vbus pin, and can inform
the state of preparation at device side to host/hub by turning on/off the 1.5 KΩ D+ pin pullup.
The Vbus input buffer which is 5 V tolerant can be directly connected to the Vbus pin on the USB bus.
The current from TrON pin is supplied by Vbus input. Since the D+/D- pins of USB bus are operated at 0 V to
3.3 V, the TrON pin reduces the voltage to 3.3 V before output.
Since the USB is constantly pulled down by 15 KΩ at host/hub side when connected electrically, a current of 0.2
mA continuously flows into the D+ pin through the pullup resistance.
Rev1.01
2004.11.01
page 6 of 122
RENESAS [ RENESAS TECHNOLOGY CORP ]
