M37161M8/MA/MF-XXXSP/FP,M37161EFSP/FP
8.15 AUTO-CLEAR CIRCUIT
When a power source is supplied, the auto-clear function will oper-
8.16 ADDRESSING MODE
The memory access is reinforced with 17 kinds of addressing modes.
ate by connecting the following circuit to the RESET pin.
Refer to SERIES 740 <Software> User’s Manual for details.
8.17 MACHINE INSTRUCTIONS
There are 71 machine instructions. Refer to SERIES 740 <Software>
User’s Manual for details.
9. TECHNICAL NOTES
• The divide ratio of the timer is 1/(n+1).
•
Even though the BBC and BBS instructions are executed imme-
diately after the interrupt request bits are modified (by the pro-
gram), those instructions are only valid for the contents before
the modification. At least one instruction cycle is needed (such as
an NOP) between the modification of the interrupt request bits
and the execution of the BBC and BBS instructions.
After the ADC and SBC instructions are executed (in the decimal
mode), one instruction cycle (such as an NOP) is needed before
the SEC, CLC, or CLD instruction is executed.
FLIT
•
0.01µF
•
•
An NOP instruction is needed immediately after the execution of
a PLP instruction.
C1
In order to avoid noise and latch-up, connect a bypass capacitor
(≈ 0.1µF) directly between the VCC pin–VSS pin and the VCC pin–
CNVSS pin, using a thick wire.
•
Characteristic value, margin of operation, etc. of versions with
built-in EPROM and built-in mask ROM may differ from each other
within the limits of the electrical characteristics in terms of manu-
facturing process, built-in ROM, difference of a layout pattern,
etc.
Carry out and check an examination equivalent to the system
evaluation examination carried out on the EPROM version when
replacing it with the Mask ROM version.
Fig.8.15.1 Auto-clear Circuit Example
Rev.1.00 2003.11.25 page 89 of 128
RENESAS [ RENESAS TECHNOLOGY CORP ]
