MULTIJUNCTION TIMERS
10.3 TOP (Output-Related 16-Bit Timer)
10
(2) Correction function of TOP delayed single-shot output mode
To change the counter value while in progress, write to the TOP correction register a value by which the
counter value is to be increased or reduced from its initial set value. To add, write the value to be added to the
correction register directly as is. To subtract, write the 2’s complement of the value to be subtracted to the
correction register.
The counter is corrected synchronously with a count clock pulse next to one at which the correction value was
written to the TOP correction register. If the counter is corrected this way, note that because one down count in
that clock period is canceled, the counter value actually is corrected by (correction register value + 1).
For example, if the reload register value is 7 and the value 3 is written to the correction register when the
counter has counted down to 3 after being reloaded, then the counter counts a total of 12 after being reloaded
before it underflows.
Count value after being reloaded = (7 + 1) + (3 + 1) = 12
1
2
3
4
5
6
7
8
9
10
11
12
Count clock
Enable = "H"
H'FFFF
(Note 1)
(7)
6
6
Counter
5
5
4
4
3
3
2
1
0
7
0
+3
Reload
register
Correction
register
3
Interrupt request
Underflow
Note 1: What actually is seen in the cycle immediately after reload is the previous counter value, and not 7.
Note: • This diagram does not show detailed timing information.
Figure 10.3.14 Example of Counting in TOP Delayed Single-shot Output Mode When Count is Corrected
When writing to the correction register, be careful not to cause the counter to overflow. Even if the counter
overflows due to correction of counts, no interrupt requests are generated for reasons of an overflow.
32180 Group User’s Manual (Rev.1.0)
10-88
RENESAS [ RENESAS TECHNOLOGY CORP ]
