MULTIJUNCTION TIMERS
10.3 TOP (Output-Related 16-Bit Timer)
10
In the example below, the reload register is initially set to H’8000. When the timer starts, the reload register
value is loaded into the counter, letting it start counting down. In the diagram below, the value H’4000 is
written to the correction register when the counter has counted down to H’5000. As a result of this correction,
the count has been increased to H’9000, so that the counter counts a total of (H’8000 + 1 + H’4000 + 1)
before it stops.
Enabled
(by writing to the enable bit
or by external input)
Disabled
(by underflow)
Count clock
Enable bit
Write to the
correction register
H'FFFF
H'FFFF
Undefined
value
H'5000+H'4000
H'(8000-1)
H'5000
Counter
H'8000
H'0000
Reload register
H'8000
Correction register
Undefined
H'4000
F/F output
Data inverted
by enable
Data inverted
by underflow
TOP interrupt request
due to underflow
Note: • This diagram does not show detailed timing information.
Figure 10.3.10 Typical Operation in TOP Single-shot Output Mode When Count is Corrected
32180 Group User’s Manual (Rev.1.0)
10-83
RENESAS [ RENESAS TECHNOLOGY CORP ]
