MULTIJUNCTION TIMERS
10.3 TOP (Output-Related 16-Bit Timer)
10
In the example below, the reload register is initially set to H’A000. (The initial counter value can be undefined,
and does not have to be specific.) When the timer starts, the reload register value is loaded into the counter,
letting it start counting. Thereafter, it continues counting down until it underflows after reaching the minimum
count.
Enabled
Disabled
(by underflow)
(by writing to the enable bit
or by external input)
Count clock
Enable bit
H'FFFF
H'FFFF
Indeterminate
Starts counting down from
the reload register set value
H'(A000-1)
value
H'A000
Counter
H'0000
H'A000
Reload register
Correction register
(Unused)
F/F output
Data inverted
by enable
Data inverted
by underflow
TOP interrupt request
due to underflow
Note: • This diagram does not show detailed timing information.
Figure 10.3.8 Typical Operation in TOP Single-shot Output Mode
32180 Group User’s Manual (Rev.1.0)
10-81
RENESAS [ RENESAS TECHNOLOGY CORP ]
