Appendix
Addressing Mode and
Instruction Length (bytes)
No. of
States*1
Condition Code
Mnemonic
Operation
I
H
N
Z
V
C
MOV.W Rs, @–ERd
W
2
ERd32–2 → ERd32
Rs16 → @ERd
—
—
0
—
6
MOV
MOV.W Rs, @aa:16
MOV.W Rs, @aa:24
MOV.L #xx:32, Rd
W
W
L
4
6
Rs16 → @aa:16
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
0
0
0
0
0
0
0
0
—
—
—
—
—
—
—
—
6
8
Rs16 → @aa:24
6
#xx:32 → Rd32
6
MOV.L ERs, ERd
L
2
ERs32 → ERd32
@ERs → ERd32
2
MOV.L @ERs, ERd
MOV.L @(d:16, ERs), ERd
MOV.L @(d:24, ERs), ERd
MOV.L @ERs+, ERd
L
4
8
L
6
@(d:16, ERs) → ERd32
@(d:24, ERs) → ERd32
10
14
10
L
10
4
L
@ERs → ERd32
ERs32+4 → ERs32
MOV.L @aa:16, ERd
MOV.L @aa:24, ERd
MOV.L ERs, @ERd
L
L
L
L
L
L
6
@aa:16 → ERd32
—
—
—
—
—
—
—
—
—
—
—
—
0
0
0
0
0
0
—
—
—
—
—
—
10
12
8
8
@aa:24 → ERd32
4
ERs32 → @ERd
MOV.L ERs, @(d:16, ERd)
MOV.L ERs, @(d:24, ERd)
MOV.L ERs, @–ERd
6
ERs32 → @(d:16, ERd)
ERs32 → @(d:24, ERd)
10
14
10
10
4
ERd32–4 → ERd32
ERs32 → @ERd
MOV.L ERs, @aa:16
MOV.L ERs, @aa:24
POP.W Rn
L
L
6
8
ERs32 → @aa:16
ERs32 → @aa:24
—
—
—
—
—
—
0
0
0
—
—
—
10
12
6
W
2
4
2
4
@SP → Rn16
SP+2 → SP
POP
POP.L ERn
PUSH.W Rn
PUSH.L ERn
L
W
L
@SP → ERn32
SP+4 → SP
—
—
—
—
—
—
0
0
0
—
—
—
10
6
SP–2 → SP
Rn16 → @SP
PUSH
SP–4 → SP
10
ERn32 → @SP
Cannot be used in
this LSI
MOVFPE MOVFPE @aa:16, Rd
MOVTPE MOVTPE Rs, @aa:16
B
B
4
4
Cannot be used in
this LSI
Cannot be used in
this LSI
Cannot be used in
this LSI
Rev. 3.00 Sep. 10, 2007 Page 462 of 528
REJ09B0216-0300
RENESAS [ RENESAS TECHNOLOGY CORP ]
