Appendix
Addressing Mode and
Instruction Length (bytes)
No. of
States*1
Condition Code
Mnemonic
Operation
I
H
N
Z
V
C
DEC.L #1, ERd
DEC.L #2, ERd
L
L
B
2
2
2
ERd32–1 → ERd32
ERd32–2 → ERd32
—
—
—
—
—
*
—
—
—
2
2
2
DEC
DAS DAS.Rd
Rd8 decimal adjust
*
→ Rd8
MULXU MULXU. B Rs, Rd
MULXU. W Rs, ERd
MULXS MULXS. B Rs, Rd
MULXS. W Rs, ERd
B
W
B
2
2
4
4
2
Rd8 × Rs8 → Rd16
(unsigned multiplication)
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
14
22
16
24
14
Rd16 × Rs16 → ERd32
(unsigned multiplication)
Rd8 × Rs8 → Rd16
(signed multiplication)
W
B
Rd16 × Rs16 → ERd32
(signed multiplication)
DIVXU DIVXU. B Rs, Rd
Rd16 ÷ Rs8 → Rd16
(RdH: remainder,
RdL: quotient)
— (6) (7) —
— (6) (7) —
— (8) (7) —
— (8) (7) —
(unsigned division)
DIVXU. W Rs, ERd
DIVXS DIVXS. B Rs, Rd
DIVXS. W Rs, ERd
W
B
2
4
4
ERd32 ÷ Rs16 → ERd32
(Ed: remainder,
—
—
—
—
—
—
22
16
24
Rd: quotient)
(unsigned division)
Rd16 ÷ Rs8 → Rd16
(RdH: remainder,
RdL: quotient)
(signed division)
W
ERd32 ÷ Rs16 → ERd32
(Ed: remainder,
Rd: quotient)
(signed division)
CMP CMP.B #xx:8, Rd
CMP.B Rs, Rd
B
B
2
4
6
Rd8–#xx:8
—
—
2
2
4
2
4
2
2
2
2
Rd8–Rs8
CMP.W #xx:16, Rd
CMP.W Rs, Rd
W
W
L
Rd16–#xx:16
Rd16–Rs16
ERd32–#xx:32
ERd32–ERs32
— (1)
— (1)
— (2)
— (2)
CMP.L #xx:32, ERd
CMP.L ERs, ERd
L
Rev. 3.00 Sep. 10, 2007 Page 464 of 528
REJ09B0216-0300
RENESAS [ RENESAS TECHNOLOGY CORP ]
