Table 10.10 32-Bit External Device/Little-Endian Access and Data Alignment
Data Bus
Strobe Signals
WE3,
DQMUU
WE2,
DQMUL
WE1,
DQMLU
WE0,
DQMLL
Operation
D31–D24 D23–D16 D15–D8 D7–D0
Byte access
at 0
—
—
—
—
—
Data
7–0
Asserted
Byte access
at 1
—
Data
7–0
—
—
—
Asserted
Byte access
at 2
Data
7–0
—
Asserted
Byte access
at 3
Data
7–0
—
—
Asserted
Word access
at 0
—
—
Data
15–8
Data
7–0
Asserted
Asserted
Asserted
Asserted
Word access Data
Data
7–0
—
—
Asserted
Asserted
Asserted
Asserted
at 2
15–8
Longword
access at 0
Data
31–24
Data
23–16
Data
15–8
Data
7–0
Table 10.11 16-Bit External Device/Little-Endian Access and Data Alignment
Data Bus
D31– D23–
Strobe Signals
WE3,
DQMUU
WE2,
DQMUL
WE1,
DQMLU
WE0,
DQMLL
Operation
D24
D16
D15–D8 D7–D0
Byte access at 0
—
—
—
Data
7–0
Asserted
Byte access at 1
Byte access at 2
Byte access at 3
Word access at 0
Word access at 2
Longword 1st time
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Data
7–0
—
Asserted
—
Data
7–0
Asserted
Data
7–0
—
Asserted
Asserted
Asserted
Asserted
Asserted
Data
15–8
Data
7–0
Asserted
Asserted
Asserted
Asserted
Data
15–8
Data
7–0
Data
15–8
Data
7–0
access
at 0
at 0
2nd time
at 2
Data
Data
31–24
23–16
Rev. 5.00, 09/03, page 263 of 760
RENESAS [ RENESAS TECHNOLOGY CORP ]
