9.4
Register Descriptions
9.4.1
Frequency Control Register (FRQCR)
The frequency control register (FRQCR) is a 16-bit readable/writable register used to specify the
frequency multiplication ratio of PLL circuit 1 and the frequency division ratio of the internal
clock and the peripheral clock.
Only word access can be used on the FRQCR register.
FRQCR is initialized to H'0102 by a power-on reset, but retains its value in a manual reset and in
standby mode.
FRQCR:
Bit:
15
STC2
0
14
IFC2
0
13
PFC2
0
12
—
0
11
—
0
10
—
0
9
—
0
8
—
1
Initial value:
R/W:
R/W
R/W
R/W
R
R
R
R
R
Bit:
7
—
0
6
—
0
5
STC1
0
4
STC0
0
3
IFC1
0
2
IFC0
0
1
PFC1
1
0
PFC0
0
Initial value:
R/W:
R
R
R/W
R/W
R/W
R/W
R/W
R/W
Bits 15, 5, and 4—Frequency Multiplication Ratio (STC): These bits specify the frequency
multiplication ratio of PLL circuit 1.
Bit 15: STC2
Bit 5: STC1
Bit 4: STC0
Description
0
0
1
0
1
0
0
0
1
0
0
1
0
0
1
× 1
(Initial value)
× 2
× 3
× 4
× 6
Except above value
Reserved
Rev. 5.00, 09/03, page 211 of 760