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HD6417750SBP200 参数 Datasheet PDF下载

HD6417750SBP200图片预览
型号: HD6417750SBP200
PDF下载: 下载PDF文件 查看货源
内容描述: 的SuperH RISC引擎 [SuperH RISC engine]
分类和应用: 外围集成电路时钟
文件页数/大小: 1039 页 / 6201 K
品牌: RENESAS [ RENESAS TECHNOLOGY CORP ]
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Bit 7—Carry Flag (CF): This flag is set to 1 on generation of a second counter carry, or a 64 Hz  
counter carry when the 64 Hz counter is read. The count register value read at this time is not  
guaranteed, and so the count register must be read again.  
Bit 7: CF  
Description  
0
No second counter carry, or 64 Hz counter carry when 64 Hz counter is read  
[Clearing condition]  
When 0 is written to CF  
1
Second counter carry, or 64 Hz counter carry when 64 Hz counter is read  
[Setting conditions]  
Generation of a second counter carry, or a 64 Hz counter carry when the  
64 Hz counter is read  
When 1 is written to CF  
Bit 4—Carry Interrupt Enable Flag (CIE): Enables or disables interrupt generation when the  
carry flag (CF) is set to 1.  
Bit 4: CIE  
Description  
0
1
Carry interrupt is not generated when CF flag is set to 1  
Carry interrupt is generated when CF flag is set to 1  
(Initial value)  
Bit 3—Alarm Interrupt Enable Flag (AIE): Enables or disables interrupt generation when the  
alarm flag (AF) is set to 1.  
Bit 3: AIE  
Description  
0
1
Alarm interrupt is not generated when AF flag is set to 1  
Alarm interrupt is generated when AF flag is set to 1  
(Initial value)  
Rev. 6.0, 07/02, page 280 of 986  
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