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HD6417750SBP200 参数 Datasheet PDF下载

HD6417750SBP200图片预览
型号: HD6417750SBP200
PDF下载: 下载PDF文件 查看货源
内容描述: 的SuperH RISC引擎 [SuperH RISC engine]
分类和应用: 外围集成电路时钟
文件页数/大小: 1039 页 / 6201 K
品牌: RENESAS [ RENESAS TECHNOLOGY CORP ]
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Bit 7—Periodic Interrupt Flag (PEF): Indicates interrupt generation at the interval specified by  
bits PES2–PES0. When this flag is set to 1, a periodic interrupt is generated.  
Bit 7: PEF  
Description  
0
Interrupt is not generated at interval specified by bits PES2–PES0  
[Clearing condition]  
When 0 is written to PEF  
1
Interrupt is generated at interval specified by bits PES2–PES0  
[Setting conditions]  
Generation of interrupt at interval specified by bits PES2–PES0  
When 1 is written to PEF  
Bits 6 to 4—Periodic Interrupt Enable (PES2–PES0): These bits specify the period for periodic  
interrupts.  
Bit 6: PES2 Bit 5: PES1 Bit 4: PES0 Description  
0
0
1
0
1
0
1
0
1
0
1
0
1
No periodic interrupt generation  
(Initial value)  
Periodic interrupt generated at 1/256-second intervals  
Periodic interrupt generated at 1/64-second intervals  
Periodic interrupt generated at 1/16-second intervals  
Periodic interrupt generated at 1/4-second intervals  
Periodic interrupt generated at 1/2-second intervals  
Periodic interrupt generated at 1-second intervals  
Periodic interrupt generated at 2-second intervals  
1
Bit 3—Oscillator Enable (RTCEN): Controls the operation of the RTC’s crystal oscillator.  
Bit 3: RTCEN  
Description  
0
1
RTC crystal oscillator is halted  
RTC crystal oscillator is operated (Initial value)  
Rev. 6.0, 07/02, page 282 of 986  
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