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HD6417750SBP200 参数 Datasheet PDF下载

HD6417750SBP200图片预览
型号: HD6417750SBP200
PDF下载: 下载PDF文件 查看货源
内容描述: 的SuperH RISC引擎 [SuperH RISC engine]
分类和应用: 外围集成电路时钟
文件页数/大小: 1039 页 / 6201 K
品牌: RENESAS [ RENESAS TECHNOLOGY CORP ]
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11.2.11 Hour Alarm Register (RHRAR)  
RHRAR is an 8-bit readable/writable register used as an alarm register for the RTC’s BCD-coded  
hour value counter, RHRCNT. When the ENB bit is set to 1, the RHRAR value is compared with  
the RHRCNT value. Comparison between the counter and the alarm register is performed for  
those registers among RSECAR, RMINAR, RHRAR, RWKAR, RDAYAR, and RMONAR in  
which the ENB bit is set to 1, and the RCR1 alarm flag is set when the respective values all match.  
The setting range is decimal 00 to 23 + ENB bit. The RTC will not operate normally if any other  
value is set.  
The ENB bit in RHRAR is initialized by a power-on reset. The other fields in RHRAR are not  
initialized by a power-on or manual reset, or in standby mode.  
Bit 6 is always read as 0. A write to this bit is invalid, but the write value should always be 0.  
Bit:  
7
6
0
5
4
3
2
1
0
ENB  
0
10-hour units  
Undefined Undefined Undefined Undefined Undefined Undefined  
R/W R/W R/W R/W R/W R/W  
1-hour units  
Initial value:  
R/W:  
R/W  
R
11.2.12 Day-of-Week Alarm Register (RWKAR)  
RWKAR is an 8-bit readable/writable register used as an alarm register for the RTC’s BCD-coded  
day-of-week value counter, RWKCNT. When the ENB bit is set to 1, the RWKAR value is  
compared with the RWKCNT value. Comparison between the counter and the alarm register is  
performed for those registers among RSECAR, RMINAR, RHRAR, RWKAR, RDAYAR, and  
RMONAR in which the ENB bit is set to 1, and the RCR1 alarm flag is set when the respective  
values all match.  
The setting range is decimal 0 to 6 + ENB bit. The RTC will not operate normally if any other  
value is set.  
The ENB bit in RWKAR is initialized by a power-on reset. The other fields in RWKAR are not  
initialized by a power-on or manual reset, or in standby mode.  
Bits 6 to 3 are always read as 0. A write to these bits is invalid, but the write value should always  
be 0.  
Rev. 6.0, 07/02, page 277 of 986  
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