Table 7.8 System Control Instructions (cont)
Instruction
SETS
Operation
Instruction Code
Privileged T Bit
1 → S
0000000001011000
0000000000011000
—
—
—
1
SETT
1 → T
SLEEP
Sleep or standby
SR → Rn
0000000000011011 Privileged
0000nnnn00000010 Privileged
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
STC
SR,Rn
STC
GBR,Rn
GBR → Rn
0000nnnn00010010
—
STC
VBR,Rn
VBR → Rn
0000nnnn00100010 Privileged
0000nnnn00110010 Privileged
0000nnnn01000010 Privileged
0000nnnn00111010 Privileged
0000nnnn11111010 Privileged
0000nnnn1mmm0010 Privileged
0100nnnn00000011 Privileged
STC
SSR,Rn
SSR → Rn
STC
SPC,Rn
SPC → Rn
STC
SGR,Rn
SGR → Rn
STC
DBR,Rn
DBR → Rn
STC
Rm_BANK,Rn
SR,@-Rn
GBR,@-Rn
VBR,@-Rn
SSR,@-Rn
SPC,@-Rn
SGR,@-Rn
DBR,@-Rn
Rm_BANK,@-Rn
Rm_BANK → Rn (m = 0 to 7)
Rn – 4 → Rn, SR → (Rn)
Rn – 4 → Rn, GBR → (Rn)
Rn – 4 → Rn, VBR → (Rn)
Rn – 4 → Rn, SSR → (Rn)
Rn – 4 → Rn, SPC → (Rn)
Rn – 4 → Rn, SGR → (Rn)
Rn – 4 → Rn, DBR → (Rn)
STC.L
STC.L
STC.L
STC.L
STC.L
STC.L
STC.L
STC.L
0100nnnn00010011
—
0100nnnn00100011 Privileged
0100nnnn00110011 Privileged
0100nnnn01000011 Privileged
0100nnnn00110010 Privileged
0100nnnn11110010 Privileged
0100nnnn1mmm0011 Privileged
Rn – 4 → Rn,
Rm_BANK → (Rn) (m = 0 to 7)
STS
MACH,Rn
MACL,Rn
PR,Rn
MACH → Rn
0000nnnn00001010
0000nnnn00011010
0000nnnn00101010
0100nnnn00000010
0100nnnn00010010
0100nnnn00100010
11000011iiiiiiii
—
—
—
—
—
—
—
—
—
—
—
—
—
—
STS
MACL → Rn
STS
PR → Rn
STS.L
STS.L
STS.L
TRAPA
MACH,@-Rn
MACL,@-Rn
PR,@-Rn
#imm
Rn – 4 → Rn, MACH → (Rn)
Rn – 4 → Rn, MACL → (Rn)
Rn – 4 → Rn, PR → (Rn)
PC + 2 → SPC, SR → SSR,
#imm << 2 → TRA,
H'160 → EXPEVT,
VBR + H'0100 → PC
Rev. 6.0, 07/02, page 188 of 986