RESET
3.3 State of internal area
➀SFR area (Addresses 016 to FF16)
Access characteristics
: It is possible to read the bit state at reading. The written value becomes valid.
: It is possible to read the bit state at reading. The written value becomes invalid.
: The written value becomes valid. It is impossible to read the bit state.
RW
RO
WO
: Nothing is assigned. It is impossible to read the bit state. The written value becomes invalid.
State immediately after reset
: “0” immediately after reset.
: “1” immediately after reset.
: Undefined immediately after
reset.
0
1
?
: Always “0” at reading.
0
1
?
0
: Always “1” at reading.
: Always undefined at reading.
: “0” immediately after reset. Fix this bit to “0.”
Address
Register name
Access characteristics
State immediately after reset
b7
b0
b7
b0
(Note 1)
(Note 1)
(Note 2)
RW
(Note 2)
RW
0
1
2
3
4
5
6
7
8
9
A
B
C
D
E
F
10 16
11 16
12 16
13 16
14 16
15 16
16 16
17 16
18 16
19 16
1A16
1B16
1C16
1D16
1E16
1F16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
?
?
?
?
?
Port P1 register
0016
?
?
Port P1 direction register
Port P2 register
RW
(Note 2)
RW
Port P2 direction register
Port P5 register
0016
?
(Note 2)
(Note 2)
RW
(Note 2)
RW
?
?
0
?
?
?
?
?
Port P5 direction register
Port P6 register
0
0
0
?
?
?
RW
RW
RW
RW
Port P7 register
?
0
0
0
0
0
0
Port P6 direction register
Port P7 direction register
0
0
0
0
(Note 2)
?
?
?
?
(Note 2)
(Note 2)
(Note 2)
(Note 2)
(Note 2)
?
?
?
?
?
?
?
?
A-D control register 0
A-D control register 1
RW
RW
0
0
?
0
0
0
0
0
0
0
0
?
?
?
0
?
?
Notes 1: Do not read and write.
2: Do not write.
Fig. 3.3.2 State of SFR and internal RAM areas immediately after reset (1)
7906 Group User’s Manual Rev.2.0
3-7
RENESAS [ RENESAS TECHNOLOGY CORP ]
