RESET
3.3 State of internal area
Register name
Address
Access characteristics
State immediately after reset
b7
b7
b0
b0
8016
8116
8216
8316
8416
8516
8616
8716
8816
8916
8A16
8B16
8C16
8D16
8E16
8F16
9016
9116
9216
9316
9416
9516
(Note 15)
(Note 15)
(Note 15)
(Note 15)
(Note 15)
(Note 15)
(Note 15)
(Note 15)
?
?
?
?
?
?
?
?
?
?
?
?
?
?
?
?
?
?
?
?
?
?
(Note 15)
(Note 15)
(Note 15)
(Note 15)
(Note 15)
RO
External interrupt input read-out register
D-A control register
9616
9716
9816
9916
9A16
9B16
9C16
9D16
?
RW RW
0
0
?
RW
RW
0016
0016
?
D-A register 0
D-A register 1
?
?
?
(Note 15)
(Note 15)
9E16 Flash memory control register (Note 16)
RW
RW
RW
0
0
1
RO
0
0
0
0
0
9F16
?
Notes 15 : Do not write.
16 : This register is allocated only to the flash memory version. (Refer to “CHAPTER 19. FLASH MEMORY
VERSION.”) This is not allocated to the mask ROM version.
Fig. 3.3.6 State of SFR and internal RAM areas immediately after reset (5)
7906 Group User’s Manual Rev.2.0
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