RTL8208B-LF/RTL8208BF-LF
Datasheet
Transmit Path
Transmit data and control information are signaled in 10-bit segments. SYNC signal is used to delimit the
10-bit segments. MAC is responsible to generate these SYNC pulses every ten clocks. For 100Mbps
mode, each segment represents a byte of data. However, for 10Mbps mode, each segment is repeated ten
times to represent a byte of data.
Table 29. SMII Transmission Encoding
TXER
TXEN
TXD0
TXD1
TXD2
TXD3
TXD4
TXD5
TXD6
TXD7
X
X
0
1
X
X
X
X
X
X
X
X
One Data Byte (Two MII Data Nibbles)
1
2
3
4
5
6
7
8
9
10
REFCLK
SYNC
TXD[0]
TX_ER TX_EN
TXD0
TXD1
TXD2
TXD3
TXD4
TXD5
TXD6
TXD7
Figure 6. SMII Transmission
Collision Detection
The RTL8208B(F)-LF does not indicate that a collision has occurred. It is left to the MAC to detect the
assertion of both CRS_DV and TX_EN.
7.7.3. SS-SMII (Source Synchronous -Serial MII)
Source-Synchronous SMII is designed for applications requiring a trace delay of more than 1ns. Three
signals are added to the SMII interface: RX_SYNC, RX_CLK, TX_CLK; and the SYNC of SMII is
modified to TX_SYNC in SS-SMII.
Figure 7. SS-SMII Signal Diagram
Single-Chip Octal 10/100-TX/FX PHY Transceiver
36
Track ID: JATR-1076-21 Rev. 1.3
REALTEK [ Realtek Semiconductor Corp. ]
