64Mbit – Enhanced SDRAM
8Mx8, 4Mx16 ESDRAM
Preliminary Datasheet
Read and Write Parameters
Symbol
Parameter
-6
-7.5
-10
Units
Notes
Min
2.0
2.3
3.0
0
-
-
-
Max
Min
2.0
2.3
3.0
0
-
-
-
1.5
0.8
7.5
22.5
Max
Min
2.0
2.3
3.0
0
-
-
-
2.0
1.0
10
25
Max
tOH3
tOH2
tOH1
tLZ
tHZ3
tHZ2
tHZ1
tDS
Data Output Hold Time (CL = 3)
Data Output Hold Time (CL = 2)
Data Output Hold Time (CL = 1)
Data Output Low-Z Time
Data Output High-Z Time (CL = 3)
Data Output High-Z Time (CL = 2)
Data Output High-Z Time (CL = 1)
Data Input Setup Time
-
-
-
-
-
-
-
-
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
1
1
1
1
1
1
1
-
4.3
4.6
7
-
-
-
4.5
4.8
7.5
-
-
-
-
-
4.7
5.0
8
-
-
1.5
0.8
6
tDH
tDPL
tDAL
Data Input Hold Time
Data Input to Precharge
Data Input to ACTV/Refresh
-
-
-
-
20
2
Notes:
1. Output timings are measured at 1.4V (LVTTL) and VDDQ = 3.3V +10%, -5% at max clock rate for the CAS latency specified. See AC Test
Load.
2. tDAL is equal to tDPL + tRP.
Refresh Parameters
Symbol
Parameter
-6
-7.5
-10
Units
Notes
Min
-
2CLK
+tRC
Max
64
-
Min
-
2CLK
+tRC
Max
64
-
Min
-
2CLK
+tRC
Max
64
-
tREF
tSREX
Refresh Period
Self Refresh Exit Time
ms
ns
1, 2
3
Notes:
1. 4096 cycles.
2. Anytime the refresh period is exceeded, a minimum of two Auto-Refresh (CBR) commands must be given to “wake up” the device.
3. Self Refresh Exit is a synchronous operation and begins on the second positive clock edge after CKE returns high. Self Refresh Exit is not
completed until tRC is satisfied once the Self Refresh Exit command is registered.
This is a product in sampling or pre-production phase of development. Charac-
teristic data and other specifications are subject to change without notice.
Enhanced Memory Systems Inc., 1850 Ramtron Dr., Colo Spgs, CO 80921
PHONE: (800) 545-DRAM; FAX: (719) 488-9095; http://www.edram.com
Page 20 of 33
Revision 1.1
RAMTRON [ RAMTRON INTERNATIONAL CORPORATION ]
