HYB18T512xxxBF–[2.5…5]
512-Mbit Double-Data-Rate-Two SDRAM
Table 41
Timing Parameter by Speed Grade - DDR2–800 (cont’d)
Parameter
Symbol
DDR2–800
Unit Note1)2)3)4)5)
6)
Min.
Max.
—
Address and control input setup time
DQ low-impedance time from CK / CK
DQS low-impedance from CK / CK
Mode register set command cycle time
OCD drive mode output delay
tIS(base)
tLZ(DQ)
tLZ(DQS)
tMRD
175
ps
ps
ps
tCK
ns
—
ps
µs
µs
ns
—
—
—
—
—
—
2 × tAC.MIN
tAC.MAX
tAC.MAX
—
tAC.MIN
2
tOIT
0
12
Data output hold time from DQS
Data hold skew factor
tQH
tHP–tQHS
—
—
tQHS
300
7.8
—
12)13)
Average periodic refresh Interval
tREFI
—
14)
15)
—
3.9
Auto-Refresh to Active/Auto-Refresh
command period
tRFC
105
—
16)
Precharge-All (4 banks) command period tRP
tRP
0.9
0.40
7.5
10
—
ns
tCK
tCK
ns
ns
ns
Read preamble
Read postamble
tRPRE
tRPST
1.1
0.60
—
—
—
17)
Active bank A to Active bank B command tRRD
period
—
—
—
Internal Read to Precharge command
delay
tRTP
7.5
—
Write preamble
Write postamble
tWPRE
tWPST
0.35 x tCK
0.40
—
tCK
tCK
ns
—
18)
0.60
—
Write recovery time for write without Auto- tWR
15
—
Precharge
19)
Write recovery time for write with Auto-
Precharge
WR
t
WR/tCK
—
tCK
20)
21)
Internal Write to Read command delay
tWTR
7.5
2
—
—
ns
Exit power down to any valid command
(other than NOP or Deselect)
tXARD
tCK
Exit active power-down mode to Read
command (slow exit, lower power)
tXARDS
tXP
8 – AL
2
—
—
tCK
tCK
—
—
Exit precharge power-down to any valid
command (other than NOP or Deselect)
Exit Self-Refresh to non-Read command
Exit Self-Refresh to Read command
tXSNR
tXSRD
t
RFC +10
—
—
ns
—
—
200
tCK
1) VDDQ = 1.8V ± 0.1V; VDD = 1.8V ± 0.1 V. See notes
2) Timing that is not specified is illegal and after such an event, in order to guarantee proper operation, the DRAM must be
powered down and then restarted through the specified initialization sequence before normal operation can continue.
3) Timings are guaranteed with CK/CK differential Slew Rate of 2.0 V/ns. For DQS signals timings are guaranteed with a
differential Slew Rate of 2.0 V/ns in differential strobe mode and a Slew Rate of 1 V/ns in single ended mode.
4) The CK / CK input reference level (for timing reference to CK / CK) is the point at which CK and CK cross.
The DQS / DQS, RDQS/ RDQS, input reference level is the crosspoint when in differential strobe mode.
5) Inputs are not recognized as valid until VREF stabilizes. During the period before VREF stabilizes, CKE = 0.2 x VDDQ is
recognized as low.
6) The output timing reference voltage level is VTT.
Internet Data Sheet
40
Rev. 1.05, 2007-01
03292006-YBYM-WG0Z
QIMONDA [ QIMONDA AG ]
