HYB18T512xxxBF–[2.5…5]
512-Mbit Double-Data-Rate-Two SDRAM
Table 6
Pin Configuration of DDR2 SDRAM
Ball#/Pin#
Name
Pin
Type
Buffer
Type
Function
B3
F3
UDM
LDM
I
I
SSTL
SSTL
Data Mask Upper/Lower Byte
I/O Driver Power Supply
Power Supplies ×4/×8/×16 organizations
A9,C1,C3,C7, VDDQ
C9
PWR
–
A1
VDD
PWR
PWR
–
–
Power Supply
A7,B2,B8,D2, VSSQ
D8
I/O Driver Power Supply
A3,E3
VSS
PWR
–
Power Supply
Power Supplies ×4/×8 organizations
E2
VREF
VDDL
VDD
AI
–
–
–
–
–
I/O Reference Voltage
Power Supply
E1
PWR
PWR
PWR
PWR
E9,H9,L1
E7
Power Supply
VSSDL
VSS
Power Supply
J1,K9
Power Supply
Power Supplies ×16 organization
J2
VREF
VDDQ
AI
–
–
I/O Reference Voltage
E9, G1, G3,
G7, G9
PWR
I/O Driver Power Supply
J1
VDDL
PWR
PWR
PWR
–
–
–
Power Supply
E1, J9, M9, R1 VDD
Power Supply
E7, F2, F8, H2, VSSQ
H8
I/O Driver Power Supply
J7
VSSDL
VSS
PWR
PWR
–
–
Power Supply
Power Supply
J3,N1,P9
Not Connected ×4 organizations
A2, B1, B9,
D1, D9,
NC
NC
–
Not Connected
G1, L3,L7, L8
Not Connected ×8 organization
G1, L3,L7, L8 NC NC
Not Connected ×16 organization
–
–
Not Connected
Not Connected
A2, E2, L1, R3, NC
R7, R8
NC
Other Pins ×4/×8 organizations
F9 ODT
Other Pins ×16 organization
K9 ODT
I
SSTL
SSTL
On-Die Termination Control
On-Die Termination Control
I
Internet Data Sheet
10
Rev. 1.05, 2007-01
03292006-YBYM-WG0Z
QIMONDA [ QIMONDA AG ]
