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PCS2I99447G-32-ET 参数 Datasheet PDF下载

PCS2I99447G-32-ET图片预览
型号: PCS2I99447G-32-ET
PDF下载: 下载PDF文件 查看货源
内容描述: 3.3V / 2.5V 1 : 9的LVCMOS时钟扇出缓冲器 [3.3V/2.5V 1:9 LVCMOS Clock Fanout Buffer]
分类和应用: 时钟
文件页数/大小: 14 页 / 561 K
品牌: PULSECORE [ PulseCore Semiconductor ]
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September 2006  
PCS2I99447  
rev 0.4  
capacitive output load, N is the number of active outputs  
(N is always 12 in case of the PCS2I99447). The  
PCS2I99447 supports driving transmission lines to  
maintain high signal integrity and tight timing parameters.  
Any transmission line will hide the lumped capacitive load  
at the end of the board trace, therefore, ΣCL is zero for  
controlled transmission line systems and can be  
eliminated from equation 1. Using parallel termination  
output termination results in equation 2 for power  
dissipation.  
Power Consumption of the PCS2I99447 and  
Thermal Management  
The PCS2I99447 AC specification is guaranteed for the  
entire operating frequency range up to 350MHz. The  
PCS2I99447 power consumption and the associated  
long-term reliability may decrease the maximum  
frequency limit, depending on operating conditions such  
as clock frequency, supply voltage, output loading,  
ambient temperature, vertical convection and thermal  
conductivity of package and board. This section  
describes the impact of these parameters on the junction  
temperature and gives a guideline to estimate the  
PCS2I99447 die junction temperature and the associated  
device reliability.  
In equation 2, P stands for the number of outputs with a  
parallel or thevenin termination, VOL, IOL, VOH and IOH are  
a function of the output termination technique and DCQ is  
the clock signal duty cycle. If transmission lines are used  
ΣCL is zero in equation 2 and can be eliminated. In  
general, the use of controlled transmission line  
techniques eliminates the impact of the lumped capacitive  
loads at the end lines and greatly reduces the power  
dissipation of the device. Equation 3 describes the die  
junction temperature TJ as a function of the power  
consumption.  
Table 9. Die junction temperature and MTBF  
Junction temperature  
MTBF (Years)  
(°C)  
100  
110  
120  
130  
20.4  
9.1  
4.2  
2.0  
Where Rthja is the thermal impedance of the package  
(junction to ambient) and TA is the ambient temperature.  
According to Table 9, the junction temperature can be  
used to estimate the long-term device reliability. Further,  
combining equation 1 and equation 2 results in a  
maximum operating frequency for the PCS2I99447 in a  
series terminated transmission line system, equation 4  
Increased power consumption will increase the die  
junction temperature and impact the device reliability  
(MTBF). According to the system-defined tolerable  
MTBF, the die junction temperature of the PCS2I99447  
needs to be controlled and the thermal impedance of the  
board/package should be optimized. The power  
dissipated in the PCS2I99447  
is represented in  
equation 1.Where ICCQ is the static current consumption  
of the PCS2I99447, CPD is the power dissipation  
capacitance per output, (Μ)ΣCL represents the external  
P
= ICCQ + VCC fCLOCK N C  
+
C
VCC  
Equation1  
L   
TOT  
PD  
M
P
=VCC ICCQ + VCC fCLOCK N C  
+
C
+
[
P
DC I  
(
VCC VOH  
)
+
(
1DCQ  
)
IOL VOL  
]
Equation 2  
Equation3  
L   
TOT  
PD  
Q
OH  
M
TJ = TA + P Rthja  
TOT  
TJMAX TA  
1
(
)
fCLOCKMAX  
=
ICCQ VCC  
Equation 4  
CPD N VC2C  
Rthja  
3.3V/2.5V 1:9 LVCMOS Clock Fanout Buffer  
9 of 14  
Notice: The information in this document is subject to change without notice.