RELEASED
PMC-Sierra, Inc.
PM9311/2/3/5 ETT1™ CHIP SET
Data Sheet
PMC-2000164
ISSUE 3
ENHANCED TT1™ SWITCH FABRIC
If the encoder is not enabled then all zeros are sent.
If the Dataslice output FIFO is empty then the Dataslice sends either Idle-ready or Idle-not-ready,
depending on the state of the receiver.
Otherwise the Dataslice will send the data cell at the head of its transmit FIFO.
Why K28.5, K27.7 etc? The Dataslice doesn’t care what the actual 10b control words are. We have chosen
K28.5 as it is the 8b/10b comma character which the Serdes receiver will try to lock to in order to determine
the word boundary in the bit stream. The choice of K27.7 and K29.7 is somewhat arbitrary but they comply
with the 8b/10b transmission rules. (Indeed any control characters can be used provided that the Dataslice
decoder table is configured appropriately.)
To summarize, the steps required to bring up the ingress and egress linecard to Dataslice links are:
•
•
•
Program the 8b/10b codec tables on each Dataslice;
Transmit Idle-not-ready cells from the linecard to each Dataslice;
Enable the 8b/10b codecs on each Dataslice causing the Dataslices to start sending
Idle-not-ready cells to the linecard;
•
•
Each Dataslice will transition to sending Idle-ready cells when it has acquired cell synchronization
from the linecard;
Likewise the linecard should transition to sending Idle-ready cells when it has acquired cell
synchronization from each Dataslice.
Eventually both the linecard and the Dataslice will be receiving the Idle-ready sequence, indicating that
both ends of the link have locked up. The linecard transmitter should then switch to sending data cells.
The Dataslice has a receive FIFO which stores the incoming words only if they are decoded as a data
word. Idle-not-ready and Idle-ready are not stored in the FIFO. A data cell is a sequence of six 8b/10b data
words (Dxx.x). These data cells are stored in the receive FIFO.
The Dataslice reads from the receive FIFO at a nominal 150MHz which is derived from a local oscillator.
This local oscillator will operate at a slightly different frequency to that used on the linecard transmitter. To
avoid overruns in the case where the linecard is at a slightly faster frequency than the Dataslice, the
linecard must send Idle cells at regular periods. The period is determined by the maximum difference in
frequency that is possible. Assuming +/-200 ppm oscillators, and allowing for storage of one extra cell in
the FIFO, then 1 in 2,500 cells must be an Idle cell to avoid overrun.
The oscillator on the ETT1 port card might be faster than that used on the linecard. Therefore, the Port
Processor contains a register that will determine the period between Idle cells sent from the ETT1 port, to
avoid overrunning the receive FIFO in the linecard.
332
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
PMC [ PMC-SIERRA, INC ]
