欢迎访问ic37.com |
会员登录 免费注册
发布采购

PM8621 参数 Datasheet PDF下载

PM8621图片预览
型号: PM8621
PDF下载: 下载PDF文件 查看货源
内容描述: NSE- 8G⑩标准产品数据表初步 [NSE-8G⑩ Standard Product Data Sheet Preliminary]
分类和应用:
文件页数/大小: 184 页 / 957 K
品牌: PMC [ PMC-SIERRA, INC ]
 浏览型号PM8621的Datasheet PDF文件第122页浏览型号PM8621的Datasheet PDF文件第123页浏览型号PM8621的Datasheet PDF文件第124页浏览型号PM8621的Datasheet PDF文件第125页浏览型号PM8621的Datasheet PDF文件第127页浏览型号PM8621的Datasheet PDF文件第128页浏览型号PM8621的Datasheet PDF文件第129页浏览型号PM8621的Datasheet PDF文件第130页  
NSE-8G™ Standard Product Data Sheet  
Preliminary  
11 Test Features Description  
The test mode registers, shown in Table 11, are used for production and board testing.  
During production testing, the test mode registers are used to apply test vectors. In this case, the  
test mode registers (as opposed to the normal mode registers) are selected when A[10] is high.  
During board testing, the digital output pins and the data bus are held in a high-impedance state  
by simultaneously asserting (low) the CSB, RDB, and WRB inputs. All of the TSBs for the NSE-  
8G are placed in test mode 0 so that device inputs may be read and device outputs may be forced  
through the microprocessor interface.  
Note: The NSE-8G supports a standard IEEE 1149.1 five-signal JTAG boundary scan test port  
that can be used for board testing. All digital device inputs may be read and all digital device  
outputs may be forced through this JTAG test port.  
Table 11 Test Mode Register Memory Map  
Address  
000H-7FFH  
800H  
Register  
Normal Mode Registers  
Master Test Register  
Reserved For Test  
801H – FFFH  
11.1 Master Test and Test Configuration Registers  
Notes on Test Mode Register Bits  
1. Writing values into unused register bits has no effect. However, to ensure software  
compatibility with future, feature-enhanced versions of the product, unused register bits must  
be written with logic zero. Reading back unused bits can produce either a logic one or a logic  
zero; hence, unused register bits should be masked off by software when read.  
2. Writeable test mode register bits are not initialized upon reset unless otherwise noted.  
Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use  
Document ID: PMC-2010850, Issue 1  
125