NSE-8G™ Standard Product Data Sheet
Preliminary
Register 116h + N*20H, ILC Interrupt Enable and Control Register
Bit
Type
Function
Unused
Reserved
RX_TIMEOUT_VAL[1:0]
RX_THRESHOLD_VAL[2:0]
Reserved
Default
X
000
00
101
0
Bit 31:16
Bit 15:13
Bit 12:11
Bit 10:8
Bit 7
R
R/W
R/W
R
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2:1
Bit 0
R/W
R/W
R/W
R/W
R/W
R/W
RX_TIMEOUTE
RX_THRSHLDE
RX_OVFLWE
RX_LINK_CHGE
RX_PAGE_CHGE[1:0]
RX_USER0_CHGE
0
0
0
0
0
0
RX_USER0_CHGE
Writing a ‘1’ to the RX_OUSER0_CHGE bit enables the generation of an interrupt on a
change of state from a ‘0’ to a ‘1’ of received message header bit RX_USER[0].
RX_PAGE_CHGE[1:0]
Writing a ‘1’ to the RX_PAGE_CHGE[n] bit enables the generation of an interrupt on a
change of state of the received PAGE bits. The RX_PAGE bits that changed value are
indicated by a ‘1’ in the corresponding RX_PAGE_CHGI[n].
RX_LINK_CHGE
Writing a ‘1’ to the RX_LINK_CHGE bit enables the generation of an interrupt on a change
of state of the received LINK bits. When either of the received LINK bits has changed value
the RX_LINK_CHGI bit will be set to a ‘1’.
If the RXFIFO level had reached the threshold value an interrupt will be generated if this bit
is ‘1’. To disable set to ‘0’.
RX_OVFLWE
Writing a ‘1’ to the RX_OVFLWE bit enables the generation of an interrupt when
RX_OVFLWI is a ‘1’.
RX_THRSHLDE
Writing a ‘1’ to the RX_THRSHLDE bit enables the generation of an interrupt when
RX_THRSHLDI is a ‘1’
Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-2010850, Issue 1
121