NSE-8G™ Standard Product Data Sheet
Preliminary
RX_TIMEOUTE
Writing a ‘1’ to the RX_TIMEOUTE bit enables the generation of an interrupt when
RX_TIMEOUTI is a ‘1’
RX_THRSHLD_VAL[2:0]
Variable Threshold dictates the minimum number of messages required to be in the RXFIFO
before an interrupt is generated. ‘000’ = 1 message ‘111’ = 8 messages.
Table 9 RXFIFO Threshold Values
RX_THRSHLD_VAL [2:0]
Messages
000
001
010
011
100
101
110
111
1
2
3
4
5
6
7
8
If the RXFIFO has not been read for the amount of time indicated by the
RXFIFO_Timeout_delay AND the FIFO is not empty an interrupt will be generated if this bit
is ‘1’. To disable set to ‘0’.
If the RXFIFO overflows an interrupt will be generated if this bit is ‘1’. To disable set to ‘0’.
If the Rx Message fails its CRC check, an interrupt will be generated if this bit is ‘1’. To
disable set to ‘0’.
RX_TIMEOUT_VAL
These bits specify a variable delay, relative to a read from the receive message FIFO, in steps
of 125 us, before an interrupt is generated, if the Receive FIFO level is greater than 0. The
objective is to stop stale messages collecting in the RXFIFO.
Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-2010850, Issue 1
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