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PM8621 参数 Datasheet PDF下载

PM8621图片预览
型号: PM8621
PDF下载: 下载PDF文件 查看货源
内容描述: NSE- 8G⑩标准产品数据表初步 [NSE-8G⑩ Standard Product Data Sheet Preliminary]
分类和应用:
文件页数/大小: 184 页 / 957 K
品牌: PMC [ PMC-SIERRA, INC ]
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NSE-8G™ Standard Product Data Sheet  
Preliminary  
Register 800H: NSE-8G Master Test  
Bit  
Type  
R
W
W
W
R/W  
W
R/W  
Function  
Unused  
PMCATST  
PMCTST  
DBCTRL  
IOTST  
Default  
Bit 31:6  
Bit 5  
Bit 4  
Bit 3  
Bit 2  
Bit 1  
Bit 0  
X
X
X
0
0
0
0
HIZDATA  
HIZIO  
This register is used to enable NSE-8G test features. All bits, except PMCTST, and PMCATST  
are reset to zero by a reset of the NSE-8G using the RSTB input. PMCTST is reset when CSB is  
high; PMCATST is reset when CSB is high and RSTB is low. PMCTST and PMCATST can also  
be reset by writing a logic 0 to the corresponding register bit.  
Access to this register is not affected by the Test Mode Address Force functions in registers  
1001H and 1002H.  
HIZIO, HIZDATA  
The HIZIO and HIZDATA bits control the tri-state modes of the NSE-8G . While the HIZIO  
bit is a logic one, all output pins of the NSE-8G except the data bus and output TDO are held  
tri-state. The microprocessor interface is still active. While the HIZDATA bit is a logic one,  
the data bus is also held in a high-impedance state which inhibits microprocessor read cycles.  
The HIZDATA bit is overridden by the DBCTRL bit.  
IOTST  
The IOTST bit is used to allow normal microprocessor access to the test registers and control  
the test mode in each TSB block in the NSE-8G for board level testing. When IOTST is a  
logic one, all blocks are held in test mode and the microprocessor may write to a block’s test  
mode 0 registers to manipulate the outputs of the block and consequently the device outputs  
(refer to the “Test Mode 0 Details” in the “Test Features” section).  
DBCTRL  
The DBCTRL bit is used to pass control of the data bus drivers to the CSB pin. When the  
DBCTRL bit is set to logic one and PMCTST is set to logic one, the CSB pin controls the  
output enable for the data bus. While the DBCTRL bit is set, holding the CSB pin low causes  
the NSE-8G to drive the data bus and holding the CSB pin high tri-states the data bus. The  
DBCTRL bit overrides the HIZDATA bit. The DBCTRL bit is used to measure the drive  
capability of the data bus driver pads.  
Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use  
Document ID: PMC-2010850, Issue 1  
126  
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